Characterization of the FE-I4B pixel readout chip production run for the ATLAS Insertable B-layer upgrade

The Insertable B-layer (IBL) is a fourth pixel layer that will be added inside the existing ATLAS pixel detector during the long LHC shutdown of 2013 and 2014. The new four layer pixel system will ensure excellent tracking, vertexing and b-tagging performance in the high luminosity pile-up conditions projected for the next LHC run. The peak luminosity is expected to reach 3 x 10^34 cm^-2 s^-1 with an integrated luminosity over the IBL lifetime of 300 fb^-1 corresponding to a design lifetime fluence of 5 x 10^15 n_eq cm^-2 and ionizing dose of 250 Mrad including safety factors. The production front-end electronics FE-I4B for the IBL has been fabricated at the end of 2011 and has been extensively characterized on diced ICs as well as at the wafer level. The production tests at the wafer level were performed during 2012. Selected results of the diced IC characterization are presented, including measurements of the on-chip voltage regulators. The IBL powering scheme, which was chosen based on these results, is described. Preliminary wafer to wafer distributions as well as yield calculations are given

Monolithic integration of Giant Magnetoresistance (GMR) devices onto standard processed CMOS dies

Giant Magnetoresistance (GMR) based technology is nowadays the preferred option for low magnetic fields sensing in disciplines such as biotechnology or microelectronics. Their compatibility with standard CMOS processes is currently investigated as a key point for the development of novel applications, requiring compact electronic readout. In this paper, such compatibility has been experimentally studied with two particular non-dedicated CMOS standards: 0.35 μm from AMS (Austria MicroSystems) and 2.5 μm from CNM (Centre Nacional de Microelectrònica, Barcelona) as representative examples. GMR test devices have been designed and fabricated onto processed chips from both technologies. In order to evaluate so obtained devices, an extended characterization has been carried out including DC magnetic measurements and noise analysis. Moreover, a 2D-FEM (Finite Element Method) model, including the dependence of the GMR device resistance with the magnetic field, has been also developed and simulated. Its potential use as electric current sensors at the integrated circuit level has also been demonstrated

VLSI Revisited - Revival in Japan

This paper describes the abundance of semiconductor consortia that have come into existence in Japan since the mid-1990s. They clearly reflect the ambition of the government - through its reorganized ministry METI and company initiatives - to regain some of the industrial and technological leadership that Japan has lost. The consortia landscape is very different in Japan compared with EU and the US. Outside Japan the universities play a much bigger and very important role. In Europe there has emerged close collaboration, among national government agencies, companies and the EU Commission in supporting the IT sector with considerable attention to semiconductor technologies. Another major difference, and possibly the most important one, is the fact that US and EU consortia include and mix partners from different areas of the semiconductor landscape including wafer makers, material suppliers, equipment producers and integrated device makers.semiconductors, Hitachi, Sony, Toshiba, Elpida, Renesas, Sematech, VLSI, JESSI, MEDEA, ASPLA, MIRAI, innovation system

VLSI REVISITED – REVIVAL IN JAPAN

This paper describes the abundance of semiconductor consortia that have come into existence in Japan since the mid-1990s. They clearly reflect the ambition of the government – through its reorganized ministry METI and company initiatives - to regain some of the industrial and technological leadership that Japan has lost. The consortia landscape is very different in Japan compared with EU and the US. Outside Japan the universities play a much bigger and very important role. In Europe there has emerged close collaboration, among national government agencies, companies and the EU Commission in supporting the IT sector with considerable attention to semiconductor technologies. Another major difference, and possibly the most important one, is the fact that US and EU consortia include and mix partners from different areas of the semiconductor landscape including wafer makers, material suppliers, equipment producers and integrated device makers.semiconductors; Hitachi; Sony; Toshiba; Elpida; Renesas; Sematech; VLSI; JESSI; MEDEA; ASPLA; MIRAI; innovation system

Initial test results on bolometers for the Planck high frequency instrument

We summarize the fabrication, flight qualification, and dark performance of bolometers completed at the Jet Propulsion Laboratory for the High Frequency Instrument (HFI) of the joint ESA/NASA Herschel/Planck mission to be launched in 2009. The HFI is a multicolor focal plane which consists of 52 bolometers operated at 100 mK. Each bolometer is mounted to a feedhorn-filter assembly which defines one of six frequency bands centered between 100-857 GHz. Four detectors in each of five bands from 143-857 GHz are coupled to both linear polarizations and thus measure the total intensity. In addition, eight detectors in each of four bands (100, 143, 217, and 353 GHz) couple only to a single linear polarization and thus provide measurements of the Stokes parameters, Q and U, as well as the total intensity. The measured noise equivalent power (NEP) of all detectors is at or below the background limit for the telescope and time constants are a few ms, short enough to resolve point sources as the 5 to 9 arc min beams move across the sky at 1 rpm

Photon-coupled isolation switch Quarterly report, 1 Oct. - 31 Dec. 1966

Integrated circuit photon coupled isolation switc

Index to 1984 NASA Tech Briefs, volume 9, numbers 1-4

Short announcements of new technology derived from the R&D activities of NASA are presented. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This index for 1984 Tech B Briefs contains abstracts and four indexes: subject, personal author, originating center, and Tech Brief Number. The following areas are covered: electronic components and circuits, electronic systems, physical sciences, materials, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences

Silicon grating structures for optical fiber interfacing and III-V/silicon opto-electronic components

In this paper, we review our work on efficient, broadband and polarization independent interfaces between a silicon-on-insulator photonic IC and a single-mode optical fiber based on grating structures. The high alignment tolerance and the fact that the optical fiber interface is out-of-plane provide opportunities for easy packaging and wafer-scale testing of the photonic IC. Next to fiber-chip interfaces we will discuss the use of silicon grating structures in III-V on silicon opto-electronic components such as integrated photodetectors and microlasers