35 research outputs found
Antenna Designs Aiming at the Next Generation of Wireless Communication
Millimeter-wave (mm-wave) frequencies have drawn large attention, specically for the fifth generation (5G) of wireless communication, due to their capability to provide high data-rates. However, design and characterization of the antenna system in wireless communication will face new challenges when we move up to higher frequency bands. The small size of the components at higher frequencies will make the integration of the antennas in the system almost inevitable. Therefore, the individual characterization of the antenna can become more challenging compared to the previous generations.This emphasizes the importance of having a reliable, simple and yet meaningful Over-the-Air (OTA) characterization method for the antenna systems. To avoid the complexity of using a variety of propagation environments in the OTA performance characterization, two extreme or edge scenarios for the propagation channels are presented, i.e., the Rich Isotropic Multipath (RIMP) and Random Line-of-Sight (Random-LoS). MIMO efficiency has been defined as a Figure of Merit (FoM), based on the Cumulative Distribution Function (CDF) of the received signal, due to the statistical behavior of the signal in both RIMP and Random-LoS. Considering this approach, we have improved the design of a wideband antenna for wireless application based on MIMO efficiency as the FoM of the OTA characterization in a Random-LoS propagation environment. We have shown that the power imbalance and the polarization orthogonality plays major roles determining the 2-bitstream MIMO performance of the antenna in Random-LoS. In addition, a wideband dual-polarized linear array is designed for an OTA Random-LoS measurement set-up for automotive wireless systems. The next generation of wireless communications is extended throughout multiple narrow frequency bands, varying within 20-70 GHz. Providing an individual antenna system for each of these bands may not be feasible in terms of cost, complexity and available physical space. Therefore, Ultra-Wideband (UWB) antenna arrays, coveringmultiple mm-wave frequency bands represent a versatile candidate for these antenna systems. In addition to having wideband characteristics, these antennas should offer an easy integration capability with the active modules. We present a new design of UWB planar arrays for mm-wave applications. The novelty is to propose planar antenna layouts to provide large bandwidth at mm-wave frequencies, using simplified standard PCB manufacturing techniques. The proposed antennas are based on Tightly Coupled Dipole Arrays (TCDAs) concept with integrated feeding network
Characterization and modeling of microwave spiral inductors and transformers
Ph.DDOCTOR OF PHILOSOPH
Passive and active circuits in cmos technology for rf, microwave and millimeter wave applications
The permeation of CMOS technology to radio frequencies and beyond has
fuelled an urgent need for a diverse array of passive and active circuits that address the
challenges of rapidly emerging wireless applications. While traditional analog based
design approaches satisfy some applications, the stringent requirements of newly
emerging applications cannot necessarily be addressed by existing design ideas and
compel designers to pursue alternatives. One such alternative, an amalgamation of
microwave and analog design techniques, is pursued in this work.
A number of passive and active circuits have been designed using a combination
of microwave and analog design techniques. For passives, the most crucial challenge to
their CMOS implementation is identified as their large dimensions that are not
compatible with CMOS technology. To address this issue, several design techniques –
including multi-layered design and slow wave structures – are proposed and
demonstrated through experimental results after being suitably tailored for CMOS
technology. A number of novel passive structures - including a compact 10 GHz hairpin resonator, a broadband, low loss 25-35 GHz Lange coupler, a 25-35 GHz thin film
microstrip (TFMS) ring hybrid, an array of 0.8 nH and 0.4 nH multi-layered high self
resonant frequency (SRF) inductors are proposed, designed and experimentally verified.
A number of active circuits are also designed and notable experimental results
are presented. These include 3-10 GHz and DC-20 GHz distributed low noise amplifiers
(LNA), a dual wideband Low noise amplifier and 15 GHz distributed voltage controlled
oscillators (DVCO). Distributed amplifiers are identified as particularly effective in the
development of wideband receiver front end sub-systems due to their gain flatness,
excellent matching and high linearity. The most important challenge to the
implementation of distributed amplifiers in CMOS RFICs is identified as the issue of
their miniaturization. This problem is solved by using integrated multi-layered inductors
instead of transmission lines to achieve over 90% size compression compared to earlier
CMOS implementations. Finally, a dual wideband receiver front end sub-system is
designed employing the miniaturized distributed amplifier with resonant loads and
integrated with a double balanced Gilbert cell mixer to perform dual band operation. The
receiver front end measured results show 15 dB conversion gain, and a 1-dB
compression point of -4.1 dBm in the centre of band 1 (from 3.1 to 5.0 GHz) and -5.2
dBm in the centre of band 2 (from 5.8 to 8 GHz) with input return loss less than 10 dB
throughout the two bands of operation
A 39GHz Balanced Power Amplifier with Enhanced Linearity in 45 nm SOI CMOS
With the high data rate communication systems that come with fifth-generation (5G) mobile networks, the shift of operation to millimeter-wave frequency becomes inevitable. The expected data rate in 5G is significantly improved over 4G by utilizing the large available channel bandwidth at millimeter wave frequencies and complex data modulation schemes. With this increase in operation frequency, many new challenges arise and research efforts are made to tackle them. Among them, the phased array system is one of the hottest topics as it can be made use of to improve the link budget and overcome the path loss challenge at these frequencies.
As the last circuit component in the transmitter's front-end right before the antenna, the power amplifier (PA) is one of the most crucial components with significant effects on overall system performance. Many of the traditional challenges of CMOS PA design such as output power and efficiency, are now compounded with the additional challenges that are imposed on complementary metal-oxide semiconductor (CMOS) PAs in millimeter wave phased array systems.
This thesis presents a balanced power amplifier design with enhanced linearity in GlobalFoundries' 45nm silicon-on-insulator (SOI) CMOS technology. By using the balanced topology with each stage terminating with a differential 2-stacked architecture, the PA achieves saturated output power of over 21 dBm. Each of the two identical sub-PAs in the balanced topology uses 2-stage topology with driver and PA co-design method. The linearity is enhanced through careful choice of biasing point and a strategic inter-stage matching network design methodology, resulting in amplitude-to-phase distortion below 1 degree up to the output 1dB compression level of over 19 dBm. The balanced amplifier topology significantly reduces the PA performance variation over mismatched load impedance at the output, thus improving the PA performance over different antenna active impedance caused by varying phased array beam-steering angles. In addition to this, the balanced topology also optimizes the PA input and output return loss, giving a better matching than -20 dB at both input and output, and minimizing the risk of potential issues and performance degradation in the system integration phase. Lastly, the compact transformer based matching networks and quadrature hybrids reduce the chip area occupation of this PA, resulting in a compact design with competitive performance
Reconfigurable Receiver Front-Ends for Advanced Telecommunication Technologies
The exponential growth of converging technologies, including augmented reality, autonomous vehicles, machine-to-machine and machine-to-human interactions, biomedical and environmental sensory systems, and artificial intelligence, is driving the need for robust infrastructural systems capable of handling vast data volumes between end users and service providers. This demand has prompted a significant evolution in wireless communication, with 5G and subsequent generations requiring exponentially improved spectral and energy efficiency compared to their predecessors. Achieving this entails intricate strategies such as advanced digital modulations, broader channel bandwidths, complex spectrum sharing, and carrier aggregation scenarios. A particularly challenging aspect arises in the form of non-contiguous aggregation of up to six carrier components across the frequency range 1 (FR1). This necessitates receiver front-ends to effectively reject out-of-band (OOB) interferences while maintaining high-performance in-band (IB) operation. Reconfigurability becomes pivotal in such dynamic environments, where frequency resource allocation, signal strength, and interference levels continuously change. Software-defined radios (SDRs) and cognitive radios (CRs) emerge as solutions, with direct RF-sampling receivers offering a suitable architecture in which the frequency translation is entirely performed in digital domain to avoid analog mixing issues. Moreover, direct RF- sampling receivers facilitate spectrum observation, which is crucial to identify free zones, and detect interferences. Acoustic and distributed filters offer impressive dynamic range and sharp roll off characteristics, but their bulkiness and lack of electronic adjustment capabilities limit their practicality. Active filters, on the other hand, present opportunities for integration in advanced CMOS technology, addressing size constraints and providing versatile programmability. However, concerns about power consumption, noise generation, and linearity in active filters require careful consideration.This thesis primarily focuses on the design and implementation of a low-voltage, low-power RFFE tailored for direct sampling receivers in 5G FR1 applications. The RFFE consists of a balun low-noise amplifier (LNA), a Q-enhanced filter, and a programmable gain amplifier (PGA). The balun-LNA employs noise cancellation, current reuse, and gm boosting for wideband gain and input impedance matching. Leveraging FD-SOI technology allows for programmable gain and linearity via body biasing. The LNA's operational state ranges between high-performance and high-tolerance modes, which are apt for sensitivityand blocking tests, respectively. The Q-enhanced filter adopts noise-cancelling, current-reuse, and programmable Gm-cells to realize a fourth-order response using two resonators. The fourth-order filter response is achieved by subtracting the individual response of these resonators. Compared to cascaded and magnetically coupled fourth-order filters, this technique maintains the large dynamic range of second-order resonators. Fabricated in 22-nm FD-SOI technology, the RFFE achieves 1%-40% fractional bandwidth (FBW) adjustability from 1.7 GHz to 6.4 GHz, 4.6 dB noise figure (NF) and an OOB third-order intermodulation intercept point (IIP3) of 22 dBm. Furthermore, concerning the implementation uncertainties and potential variations of temperature and supply voltage, design margins have been considered and a hybrid calibration scheme is introduced. A combination of on-chip and off-chip calibration based on noise response is employed to effectively adjust the quality factors, Gm-cells, and resonance frequencies, ensuring desired bandpass response. To optimize and accelerate the calibration process, a reinforcement learning (RL) agent is used.Anticipating future trends, the concept of the Q-enhanced filter extends to a multiple-mode filter for 6G upper mid-band applications. Covering the frequency range from 8 to 20 GHz, this RFFE can be configured as a fourth-order dual-band filter, two bandpass filters (BPFs) with an OOB notch, or a BPF with an IB notch. In cognitive radios, the filter’s transmission zeros can be positioned with respect to the carrier frequencies of interfering signals to yield over 50 dB blocker rejection
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CMOS low noise amplifier design utilizing monolithic transformers
Full integration of CMOS low noise amplifiers (LNA) presents a challenge for low
cost CMOS receiver systems. A critical problem faced in the design of an RF CMOS LNA
is the inaccurate high-frequency noise model of the MOSFET implemented in circuit
simulators such as SPICE. Silicon-based monolithic inductors are another bottleneck in RF
CMOS design due to their poor quality factor.
In this thesis, a CMOS implementation of a fully-integrated differential LNA is
presented. A small-signal noise circuit model that includes the two most important noise
sources of the MOSFET at radio frequencies, channel thermal noise and induced gate
current noise, is developed for CMOS LNA analysis and simulation. Various CMOS LNA
architectures are investigated. The optimization techniques and design guidelines and
procedures for an LC tuned CMOS LNA are also described.
Analysis and modeling of silicon-based monolithic inductors and transformers are
presented and it is shown that in fully-differential applications, a monolithic transformer
occupies less die area and achieves a higher quality factor compared to two independent
inductors with the same total effective inductance. It is also shown that monolithic
transformers improve the common-mode rejection of the differential circuits