Testing of Level Shifters in Multiple Voltage Designs

The use of multiple voltages for different cores is becoming a widely accepted technique for efficient power management. Level shifters are used as interfaces between voltage domains. Through extensive transistor level simulations of resistive open, bridging and resistive short faults, we have classified the testing of level shifters into PASSIVE and ACTIVE modes. We examine if high test coverage can be achieved in the PASSIVE mode. We consider resistive opens and shorts and show that, for testing purposes, consideration of purely digital fault effects is sufficient. Thus conventional digital DfT can be employed to test level shifters. In all cases, we conclude that using sets of single supply voltages for testing is sufficient

Assessing the effects of power quality on partial discharge behaviour through machine learning

Partial discharge (PD) is commonly used as an indicator of insulation health in high voltage equipment, but research has indicated that power quality, particularly harmonics, can strongly influence the discharge behaviour and the corresponding pattern observed. Unacknowledged variation in harmonics of the excitation voltage waveform can influence the insulation's degradation, leading to possible misinterpretation of diagnostic data and erroneous estimates of the insulation's ageing state, thus resulting in inappropriate asset management decisions. This paper reports on a suite of classifiers for identifying pertinent harmonic attributes from PD data, and presents results of techniques for improving their accuracy. Aspects of PD field monitoring are used to design a practical system for on-line monitoring of voltage harmonics. This system yields a report on the harmonics experienced during the monitoring period

Identifying harmonic attributes from online partial discharge data

Partial discharge (PD) monitoring is a key method of tracking fault progression and degradation of insulation systems. Recent research discovered that the harmonic regime experienced by the plant also affects the PD pattern, questioning the conclusions about equipment health drawn from PD data. This paper presents the design and creation of an online system for harmonic circumstance monitoring of distribution cables, using only PD data. Based on machine learning techniques, the system can assess the prevalence of the 5th and 7th harmonic orders over the monitoring period. This information is key for asset managers to draw correct conclusions about the remaining life of polymeric cable insulation, and prevent overestimation of the degradation trend

Delay test for diagnosis of power switches

Power switches are used as part of power-gating technique to reduce leakage power of a design. To the best of our knowledge, this is the first work in open-literature to show a systematic diagnosis method for accurately diagnosingpower switches. The proposed diagnosis method utilizes recently proposed DFT solution for efficient testing of power switches in the presence of PVT variation. It divides power switches into segments such that any faulty power switch is detectable thereby achieving high diagnosis accuracy. The proposed diagnosis method has been validated through SPICE simulation using a number of ISCAS benchmarks synthesized with a 90-nm gate library. Simulation results show that when considering the influence of process variation, the worst case loss of accuracy is less than 4.5%; and the worst case loss of accuracy is less than 12% when considering VT (Voltage and Temperature) variations

Investigation into voltage and process variation-aware manufacturing test

Increasing integration and complexity in IC design provides challenges for manufacturing testing. This thesis studies how process and supply voltage variation influence defect behaviour to determine the impact on manufacturing test cost and quality. The focus is on logic testing of static CMOS designs with respect to two important defect types in deep submicron CMOS: resistive bridges and full opens. The first part of the thesis addresses testing for resistive bridge defects in designs with multiple supply voltage settings. To enable analysis, a fault simulator is developed using a supply voltage-aware model for bridge defect behaviour. The analysis shows that for high defect coverage it is necessary to perform test for more than one supply voltage setting, due to supply voltage-dependent behaviour. A low-cost and effective test method is presented consisting of multi-voltage test generation that achieves high defect coverage and test set size reduction without compromise to defect coverage. Experiments on synthesised benchmarks with realistic bridge locations validate the proposed method.The second part focuses on the behaviour of full open defects under supply voltage variation. The aim is to determine the appropriate value of supply voltage to use when testing. Two models are considered for the behaviour of full open defects with and without gate tunnelling leakage influence. Analysis of the supply voltage-dependent behaviour of full open defects is performed to determine if it is required to test using more than one supply voltage to detect all full open defects. Experiments on synthesised benchmarks using an extended version of the fault simulator tool mentioned above, measure the quantitative impact of supply voltage variation on defect coverage.The final part studies the impact of process variation on the behaviour of bridge defects. Detailed analysis using synthesised ISCAS benchmarks and realistic bridge model shows that process variation leads to additional faults. If process variation is not considered in test generation, the test will fail to detect some of these faults, which leads to test escapes. A novel metric to quantify the impact of process variation on test quality is employed in the development of a new test generation tool, which achieves high bridge defect coverage. The method achieves a user-specified test quality with test sets which are smaller than test sets generated without consideration of process variation

Fault diagnosis in a five-level multilevel inverter using an artificial neural network approach

Introduction. Cascaded H-bridge multilevel inverters (CHB-MLI) are becoming increasingly used in applications such as distribution systems, electrical traction systems, high voltage direct conversion systems, and many others. Despite the fact that multilevel inverters contain a large number of control switches, detecting a malfunction takes a significant amount of time. In the fault switch configurations diode included for freewheeling operation during open-fault condition. During short circuit fault conditions are carried out by the fuse, which can reveal the freewheeling current direction. The fault category can be identified independently and also failure of power switches harmed by the functioning and reliability of CHB-MLI. This paper investigates the effects and performance of open and short switching faults of multilevel inverters. Output voltage characteristics of 5 level MLI are frequently determined from distinctive switch faults with modulation index value of 0.85 is used during simulation analysis. In the simulation experiment for the modulation index value of 0.85, one second open and short circuit faults are created for the place of faulty switch. Fault is identified automatically by means of artificial neural network (ANN) technique using sinusoidal pulse width modulation based on distorted total harmonic distortion (THD) and managed by its own. The novelty of the proposed work consists of a fast Fourier transform (FFT) and ANN to identify faulty switch. Purpose. The proposed architecture is to identify faulty switch during open and short failures, which has to be reduced THD and make the system in reliable operation. Methods. The proposed topology is to be design and evaluate using MATLAB/Simulink platform. Results. Using the FFT and ANN approaches, the normal and faulty conditions of the MLI are explored, and the faulty switch is detected based on voltage changing patterns in the output. Practical value. The proposed topology has been very supportive for implementing non-conventional energy sources based multilevel inverter, which is connected to large demand in grid.Вступ. Каскадні багаторівневі інвертори H-bridge все частіше використовуються в таких пристроях, як розподільні системи, електричні тягові системи, системи прямого перетворення високої напруги та багато інших. Незважаючи на те, що багаторівневі інвертори містять велику кількість перемикачів, що управляють, виявлення несправності займає значний час. У конфігурації аварійного вимикача увімкнено діод для роботи в режимі вільного ходу в умовах обриву несправності. При короткому замиканні аварійні стани виконуються запобіжником, який може визначити напрямок струму вільного ходу. Категорія несправності може бути визначена самостійно, а також відмова силових вимикачів, що порушує функціонування та надійність каскадних багаторівневих інверторів H-bridge. У цій статті досліджуються наслідки та характеристики обривів та коротких замикань багаторівневих інверторів. Характеристики вихідної напруги 5-рівневого інвертору часто визначаються характерними несправностями перемикача, при цьому при аналізі моделювання використовується значення індексу модуляції 0,85. В імітаційному експерименті значення індексу модуляції 0,85 в місці несправного перемикача створюються односекундні обриви і коротке замикання. Несправність ідентифікується автоматично за допомогою методу штучної нейронної мережі з використанням синусоїдальної широтно-імпульсної модуляції на основі спотвореного повного гармонійного спотворення та керується самостійно. Новизна запропонованої роботи полягає у застосуванні швидкого перетворення Фур’є та штучної нейронної мережі для ідентифікації несправного перемикача. Мета. Пропонована архітектура призначена для виявлення несправного комутатора при розмиканні та короткочасних відмовах, що має знизити повне гармонійне спотворення та забезпечити надійну роботу системи. методи. Запропонована топологія має бути спроектована та оцінена з використанням платформи MATLAB/Simulink. Результати. Використовуючи підходи швидкого перетворення Фур’є та штучної нейронної мережі, досліджуються нормальні та несправні стани багаторівневих інверторів, і несправний перемикач виявляється на основі моделей зміни напруги на виході. Практична цінність. Запропонована топологія дуже сприятлива для реалізації нетрадиційних джерел енергії на основі багаторівневого інвертора, пов'язаного з великим попитом у мережі

Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs

Manufacturing defects that do not affect the functional operation of low power Integrated Circuits (ICs) can nevertheless impact their power saving capability. We show that stuck-ON faults on the power switches and resistive bridges between the power networks can impair the power saving capability of power-gating designs. For quantifying the impact of such faults on the power savings of power-gating designs, we propose a diagnosis technique that targets bridges between the power networks. The proposed technique is based on the static power analysis of a power-gating design in stand-by mode and it utilizes a novel on-chip signature generation unit, which is sensitive to the voltage level between power rails, the measurements of which are processed off-line for the diagnosis of bridges that can adversely affect power savings. We explore, through SPICE simulation of the largest IWLS’05 benchmarks synthesised using a 32 nm CMOS technology, the trade-offs achieved by the proposed technique between diagnosis accuracy and area cost and we evaluate its robustness against process variation. The proposed technique achieves a diagnosis resolution that is higher than 98.6% and 97.9% for bridges of R ≳ 10MΩ(weak bridges) and bridges of R ≲ 10MΩ (strong bridges), respectively, and a diagnosis accuracy higher than 94.5% for all the examined defects. The area overhead is small and scalable: it is found to be 1.8% and 0.3% for designs with 27K and 157K gate equivalents, respectively

Review of recent research towards power cable life cycle management

Power cables are integral to modern urban power transmission and distribution systems. For power cable asset managers worldwide, a major challenge is how to manage effectively the expensive and vast network of cables, many of which are approaching, or have past, their design life. This study provides an in-depth review of recent research and development in cable failure analysis, condition monitoring and diagnosis, life assessment methods, fault location, and optimisation of maintenance and replacement strategies. These topics are essential to cable life cycle management (LCM), which aims to maximise the operational value of cable assets and is now being implemented in many power utility companies. The review expands on material presented at the 2015 JiCable conference and incorporates other recent publications. The review concludes that the full potential of cable condition monitoring, condition and life assessment has not fully realised. It is proposed that a combination of physics-based life modelling and statistical approaches, giving consideration to practical condition monitoring results and insulation response to in-service stress factors and short term stresses, such as water ingress, mechanical damage and imperfections left from manufacturing and installation processes, will be key to success in improved LCM of the vast amount of cable assets around the world