Active C4 electrodes for local field potential recording applications

Extracellular neural recording, with multi-electrode arrays (MEAs), is a powerful method used to study neural function at the network level. However, in a high density array, it can be costly and time consuming to integrate the active circuit with the expensive electrodes. In this paper, we present a 4 mm × 4 mm neural recording integrated circuit (IC) chip, utilizing IBM C4 bumps as recording electrodes, which enable a seamless active chip and electrode integration. The IC chip was designed and fabricated in a 0.13 μm BiCMOS process for both in vitro and in vivo applications. It has an input-referred noise of 4.6 μV rms for the bandwidth of 10 Hz to 10 kHz and a power dissipation of 11.25 mW at 2.5 V, or 43.9 μW per input channel. This prototype is scalable for implementing larger number and higher density electrode arrays. To validate the functionality of the chip, electrical testing results and acute in vivo recordings from a rat barrel cortex are presented.R01 NS072385 - NINDS NIH HHS; 1R01 NS072385 - NINDS NIH HH

Three-dimensional Tip Electrode Array Technology for High Resolution Neuro-Electronic Systems used in Electrophysiological Experiments in-vitro

A three-dimensional tip electrode array technology for in-vitro electrophysiological experiments is presented. Based on simulation results obtained with a finite element model of the neuron-electrode interface, it has been shown that the electrical coupling between the neural cells and the three-dimensional tip electrode array is improved compared to standard planar electrodes. Consequently, three-dimensional microelectrode arrays (MEAs) exhibiting a higher spatial resolution than classical integrated MEA systems have been manufactured using the proposed fabrication process. Three-dimensional tip electrode arrays with an electrode diameter of 3-4µm, a height of 1.75µm, and a pitch dimension of 5-6µm have been manufactured on silicon substrate. Future in-vitro electrophysiological experiments are expected to confirm the superiority of the three-dimensional electrodes over the planar electrodes

From Understanding Cellular Function to Novel Drug Discovery: The Role of Planar Patch-Clamp Array Chip Technology

All excitable cell functions rely upon ion channels that are embedded in their plasma membrane. Perturbations of ion channel structure or function result in pathologies ranging from cardiac dysfunction to neurodegenerative disorders. Consequently, to understand the functions of excitable cells and to remedy their pathophysiology, it is important to understand the ion channel functions under various experimental conditions – including exposure to novel drug targets. Glass pipette patch-clamp is the state of the art technique to monitor the intrinsic and synaptic properties of neurons. However, this technique is labor intensive and has low data throughput. Planar patch-clamp chips, integrated into automated systems, offer high throughputs but are limited to isolated cells from suspensions, thus limiting their use in modeling physiological function. These chips are therefore not most suitable for studies involving neuronal communication. Multielectrode arrays (MEAs), in contrast, have the ability to monitor network activity by measuring local field potentials from multiple extracellular sites, but specific ion channel activity is challenging to extract from these multiplexed signals. Here we describe a novel planar patch-clamp chip technology that enables the simultaneous high-resolution electrophysiological interrogation of individual neurons at multiple sites in synaptically connected neuronal networks, thereby combining the advantages of MEA and patch-clamp techniques. Each neuron can be probed through an aperture that connects to a dedicated subterranean microfluidic channel. Neurons growing in networks are aligned to the apertures by physisorbed or chemisorbed chemical cues. In this review, we describe the design and fabrication process of these chips, approaches to chemical patterning for cell placement, and present physiological data from cultured neuronal cells

Electrical modeling of the cell-electrode interface for recording neural activity from high-density microelectrode arrays

Accurate electrical models are needed to support the design of modern microelectrode arrays. The point-contact model is presented thoroughly, and an area-contact model is analytically derived in order to model the electrical characteristics of the cell-electrode interface at subcellular resolution. An optimum electrode diameter for recording the electrical activity of neurons is analytically determined at 8 um, with a cell diameter of 10 um and a typical load capacitance of 10 pF. Finally, three- dimensional tip electrodes are characterized using the area- contact model. An improvement of the electrical coupling up to 20 dB is observed for small electrodes, in simulation

Low-noise Amplifier for Neural Recording

With a combination of engineering approaches and neurophysiological knowledge of the central nervous system, a new generation of medical devices is being developed to link groups of neurons with microelectronic systems. By doing this, researchers are acquiring fundamental knowledge of the mechanisms of disease and innovating treatments for disabilities in patients who have a failure of communication along neural pathways. A low-noise and low-power analog front-end circuit is one of the primary requirements for neural recording. The main function for the front-end amplifier is to provide gain over the bandwidth of neural signals and to reject undesired frequency components. The chip developed in this thesis is a field-programmable analog front-end amplifier consisting of 16 programmable channels with tunable frequency response. A capacitively coupled two-stage amplifier is used. The first-stage amplifier is a Low-Noise Amplifier (LNA), as it directly interfaces with the neural recording micro-electrodes; the second stage is a high gain and high swing amplifier. A MOS resistor in the feedback path is used to get tunable low-cut-off frequency and reject the dc offset voltage. Our design builds upon previous recording chips designed by two former graduate stu- dents in our lab. In our design, the circuits are optimized for low noise. Our simulations show the recording channel has a gain of 77.9 dB and input-referred noise of 6.95 µV rms(Root-Mean-Square voltage) over 750 Hz to 6.9 kHz. The chip is fabricated in AMS 0.35 µm CMOS technology for a total die area of 3 x 3 mm 2 and Total Power Dissipation (TPD) of 2.9 mW. To verify the functionality and adherence to the design specifications it will be tested on Printed-Circuit-Board

Design and Implementation of a Multi-Channel Field-Programmable Analog Front-End For a Neural Recording System

Neural recording systems have attracted an increasing amount of attention in recent years, and researchers have put major efforts into designing and developing devices that can record and monitor neural activity. Understanding the functionality of neurons can be used to develop neuroprosthetics for restoring damages in the nervous system. An analog front-end block is one of the main components in such systems, by which the neuron signals are amplified and processed for further analysis. In this work, our goal is to design and implement a field-programmable 16-channel analog front-end block, where its programmability is used to deal with process variation in the chip. Each channel consists of a two-stage amplifier as well as a band-pass filter with digitally tunable low corner frequency. The 16 recording channels are designed using four different architectures. The first group of recording channels employs one low-noise amplifier (LNA) as the first-stage amplifier and a fully differential amplifier for the second stage along with an NMOS transistor in the feedback loop. In the second group of architectures, we use an LNA as the first stage and a single-ended amplifier for implementing the second stage. Groups three and four have the same design as groups one and two; however the NMOS transistor in the feedback loop is replaced by two PMOS transistors. In our design, the circuits are optimized for low noise and low power consumption. Simulations result in input-referred noise of 6.9 μVrms over 0.1 Hz to 1 GHz. Our experiments show the recording channel has a gain of 77.5 dB. The chip is fabricated in AMS 0.35 μm CMOS technology for a total die area of 3 mm×3 mm and consumes 2.7 mW power from a 3.3 V supply. Moreover, the chip is tested on a PCB board that can be employed for in-vivo recording

A 256-input micro-electrode array with integrated cmos amplifiers for neural signal recording

Thesis (Ph.D.)--Boston UniversityThe nervous system communicates and processes information through its basic structural units -- individual neurons (nerve cells). Neurons convey neural information via electrical and chemical signals, which makes electrophysiological recording techniques very important in the study of neurophysiology. Specifically, active microelectrode arrays (MEAs) with amplifiers integrated on the same substrate are used because they provide a very powerful neural electrical recording technique that can be directly interfaced to acute slices and cell cultures. 2D planer electrodes are typically used for recording from neural cultures in vitro, while in vivo recording in live animals invariably requires the use of 3D electrodes. I have designed an active MEA with neural amplifiers and 3D electrodes, all integrated on a single chip. The electrodes are commercially available 3D C4 (Controlled Collapse Chip Connect) flip-chip bonding solder balls that have a diameter of 100 µm and a pitch of 200 µm. An active MEA neural recording chip -- the Multiple-Input Neural Sensor (MINS) chip -- was designed and fabricated using the IBM BiCMOS 8HP 0.13 µm technology. The MINS IC has 256 input channels that are time-division multiplexed into two output pads. Each channel was designed to work at a 20 kHz frame rate with a total voltage gain of 60 dB per channel with an input-referred noise voltage of 5.3 µVrms over 10 Hz to 10 kHz. The entire MINS chip has an area of 4 x 4 mm^2 with 256 input C4s plus 20 wire-bond pads on two adjacent edges of the chip for power, control, and outputs. The fabricated MINS chips are wire-bonded to standard pin grid array (PGA), open-top PGA, and custom-designed printed circuit board (PCB) packages for electrical, in vitro, and in vivo testing, respectively. After process variation correction, the voltage gain of the 256 neural amplifiers, measured in vitro across several chips, has a mean value of 58.7 dB and a standard deviation of 0.37 dB. Measurements done with the electrical testing package demonstrate that the MINS IC has a flat frequency response from 0.05 Hz to 1.4 MHz, an input-referred noise voltage of 4.6 µVrms over 10 Hz to 10 kHz, an output voltage swing as large as 1.5 V peak-to-peak, and a total power consumption of 11.25 mW, or 43.9 µW per input channel

Electronic bidirectional interfaces to the peripheral nervous system for prosthetic applications

The research presented in this thesis concerns the field of bioelectronics, in particular the work has been focused on the development of special electronic devices for neural signal acquisition and Peripheral Nervous System (PNS) stimulation. The final aim of the project in which this work is involved is in fact the realization of a prosthetic hand controlled using neural signals. The commercially available prosthesis are based on Electromyographic (EMG) signals, their use implies unnatural movements for the patient that needs a special training to develop the control capabilities over the mechanical limb. The proposed approach offers a number of advantages compared to the traditional prosthesis, first because the signals used are the same used to control the biologic limb, allowing a more comfortable solution for the patient that gets closer to feel the robotic hand as a natural extension of his/her body. Secondly, placing temperature and pressure sensors on the limb surface, it is possible to trasduce such information in an electrical current that, injected into the PNS, can restore the sensory feedback in amputees. The final goal of this research is the development of a fully implantable device able to perform a bidirectional communication between the robotic hand and the patient. Due to small area, low noise and low power constraints, the only possible way to reach this aim is the design of a full custom Integrated Circuit (IC). However a preliminary evaluation of the key design features, such as neural signal amplitudes and frequencies as well as stimulation shape parameters, is necessary in order to define clearly and precisely the design specifications. A low-cost and short implementation time device is then needed for this aim, the Components Off The Shelf (COTS) approach seems to be the best solution for this purpose. A Printed Circuit Board (PCB) with discrete components has been designed, developed and tested, the information extracted by the test results have been used to guide the IC design. The generation of electrical signals in biological cells, such as neural spikes, is possible thanks to ions that move across the cell membrane. In many applications it is important, not only to record the spikes, but also to measure these small currents in order to understand which electro-chemical processes are involved in the signal generation and to have a direct measurement of the ion channels involved in the reaction. Ion currents, in fact, play a key role in several physiological processes, in neural signal generation, but also in the maintenance of heartbeat and in muscle contraction. For this purpose, a system level implementation of a Read out circuit for ion channel current detection has been developed