Impact of the gate oxide reliability of SiC MOSFETs on the junction temperature estimation using temperature sensitive electrical parameters

Bias temperature instability (BTI) is more problematic in SiC power MOSFETs due to the occurrence of higher interface state traps and fixed oxide traps compared to traditional silicon MOS interfaces where there are no carbon atoms degrading the atomically smooth Si/SiO2 interface. The use of temperature sensitive electrical parameters (TSEPs) for measuring the junction temperature and enabling health monitoring based on junction temperature identification is a promising technique for increasing the reliability of power devices, however in the light of increased BTI in SiC devices, this must be carefully assessed. This paper evaluates how BTI of SiC power MOSFETs under high temperature gate bias stresses affects the electrical parameters used as TSEPs and its impact on condition monitoring

Bias temperature instability and condition monitoring in SiC power MOSFETs

Threshold voltage shift due to bias temperature instability (BTI) is a major concern in SiC power MOSFETs. The SiC/SiO2 gate dielectric interface is typically characterized by a higher density of interface traps compared to the conventional Si/SiO2 interface. The threshold voltage shift that arises from BTI has significant implications on the reliability of SiC power MOSFETs, hence, techniques for detecting the change in electrical parameters due to gate oxide degradation are desirable. Using accelerated high temperature gate bias stress tests on SiC MOSFETs, it has been shown that the output and transfer characteristics are affected by BTI. This paper presents the impact BTI induced threshold voltage shift on the forward voltage of the SiC MOSFET body diode during third quadrant operation. Using the forward voltage of the body diode during reverse conduction of low currents, threshold voltage shift can be detected, hence, the impact of BTI can be evaluated. The implications of the body diode forward voltage shift on junction temperature measurements are also studied in the context of TSEPs. The findings in this paper are important for engineers seeking to implement condition and health monitoring techniques on SiC power devices

Bias temperature instability and junction temperature measurement using electrical parameters in SiC power MOSFETs

Junction temperature sensing is an integral part of both on-line and off-line condition monitoring where direct access the bare die surface is not available. Given a defined power input, the junction temperature enables the estimation of the junction-to-case thermal resistance, which is a key indicator of packaging failure mechanisms like solder voiding and cracks. The use of temperature sensitive electrical parameters has widely been proposed as a means of junction temperature sensing however, there are certain challenges regarding their use in SiC MOSFETs. Bias Temperature Instability from charge trapping in the gate dielectric causes threshold voltage drift, which in SiC affects some of the key temperature sensitive electrical parameters including ON-state resistance, body diode forward voltage as well as the current commutation rate. This paper reviews the impact of bias temperature instability on the accurate junction temperature measurement using temperature sensitive electrical parameters in SiC MOSFETs

A novel non-intrusive technique for BTI characterization in SiC MOSFETs

Threshold voltage ( $V_{TH}$ ) shift due to Bias Temperature Instability (BTI) is a well-known problem in SiC-MOSFETs that occurs due to oxide traps in the $SiC/SiO_2$ gate interface. The reduced band offsets and increased interface/fixed oxide traps in SiC-MOSFETs makes this a more critical problem compared to silicon. Before qualification, power devices are subjected to gate bias stress tests after which $V_{TH}$ shift is monitored. However, some recovery occurs between the end of the stress and $V_{TH}$ characterisation, thereby potentially under-estimating the extent of the problem. In applications where the SiC-MOSFET is turned OFF with a negative bias at high temperature, if $V_{TH}$ shift is severe enough there may be electrothermal failure due to current crowding since parallel devices lose synchronization during turn-ON. In this paper, a novel method that uses the forward voltage of the body diode during reverse conduction of a small sensing current is introduced as a technique for monitoring $V_{TH}$ shift and recovery due to BTI. This non-invasive method exploits the increased body effect that is peculiar SiC-MOSFETs due to the higher body diode forward voltage. With the proposed method, it is possible to non-invasively assess $V_{TH}$ shift dynamically during BTI characterization tests

Crosstalk in SiC power MOSFETs for evaluation of threshold voltage shift caused by bias temperature instability

Threshold voltage drift from Bias Temperature Instability is known to be a reliability concern for SiC MOSFETs. Negative bias temperature instability (NBTI) results from positive charge trapping at the gate dielectric interface and is more problematic in SiC due to the higher interface trap density. Turning SiC MOSFETs OFF with negative voltages to avoid Miller coupling induced cross-talk can cause VTH shifts in periods with long standby duration and high temperatures. This paper proposes a novel test method for BTI characterization that relies on measuring the shoot-through current and charge during switching transients. The method exploits the Miller coupling between 2 devices in the same phase and uses the shoot-through current from parasitic turn-ON to monitor VTH. Standard techniques require the use of static measurements (typically from a parameter analyzer or a curve tracer) to determine the threshold voltage shift. These conventional methods can underestimate the VTH shift since the recovery from charge de-trapping can mask the true extent of the problem. The proposed methodology uses the actual converter environment to investigate the VTH shift and should therefore be of more interest to applications engineers as opposed to device physicists. Furthermore, it avoids the problem of VTH recovery and is therefore more accurate in VTH shift characterization

Non-intrusive methodologies for characterization of bias temperature instability in SiC power MOSFETs

The gate oxide reliability of SiC power MOSFETs remains a challenge, despite the improvements of the new generation power devices. The threshold voltage drift caused by Bias Temperature Instability (BTI) has been subject of different studies and methods have been proposed to evaluate the real magnitude of the threshold voltage shift. These methodologies usually focus on the characterization of the threshold voltage shift, rather than its implications to the operation or how the threshold voltage shift can be detected during the application. This paper presents two non-intrusive methodologies which can assess and determine the impact of BTI-induced. The proposed methodologies are able to capture the peak shift and subsequent recovery after stress removal

SiC power MOSFETs performance, robustness and technology maturity

Relatively recently, SiC power MOSFETs have transitioned from being a research exercise to becoming an industrial reality. The potential benefits that can be drawn from this technology in the electrical energy conversion domain have been amply discussed and partly demonstrated. Before their widespread use in the field, the transistors need to be thoroughly investigated and later validated for robustness and longer term stability and reliability. This paper proposes a review of commercial SiC power MOSFETs state-of-the-art characteristics and discusses trends and needs for further technology improvements, as well as device design and engineering advancements to meet the increasing demands of power electronics