91 research outputs found
Near-optimal small-depth lower bounds for small distance connectivity
We show that any depth- circuit for determining whether an -node graph
has an -to- path of length at most must have size
. The previous best circuit size lower bounds for this
problem were (due to Beame, Impagliazzo, and Pitassi
[BIP98]) and (following from a recent formula size
lower bound of Rossman [Ros14]). Our lower bound is quite close to optimal,
since a simple construction gives depth- circuits of size
for this problem (and strengthening our bound even to
would require proving that undirected connectivity is not in )
Our proof is by reduction to a new lower bound on the size of small-depth
circuits computing a skewed variant of the "Sipser functions" that have played
an important role in classical circuit lower bounds [Sip83, Yao85, H{\aa}s86].
A key ingredient in our proof of the required lower bound for these Sipser-like
functions is the use of \emph{random projections}, an extension of random
restrictions which were recently employed in [RST15]. Random projections allow
us to obtain sharper quantitative bounds while employing simpler arguments,
both conceptually and technically, than in the previous works [Ajt89, BPU92,
BIP98, Ros14]
A New Lower Bound Technique for Quantum Circuits without Ancillae
We present a technique to derive depth lower bounds for quantum circuits. The technique is based on the observation that in circuits without ancillae, only a few input states can set all the control qubits of a Toffoli gate to 1. This can be used to selectively remove large Toffoli gates from a quantum circuit while keeping the cumulative error low. We use the technique to give another proof that parity cannot be computed by constant depth quantum circuits without ancillæ
Lower Bounds for DeMorgan Circuits of Bounded Negation Width
We consider Boolean circuits over {or, and, neg} with negations applied only to input variables. To measure the "amount of negation" in such circuits, we introduce the concept of their "negation width". In particular, a circuit computing a monotone Boolean function f(x_1,...,x_n) has negation width w if no nonzero term produced (purely syntactically) by the circuit contains more than w distinct negated variables. Circuits of negation width w=0 are equivalent to monotone Boolean circuits, while those of negation width w=n have no restrictions. Our motivation is that already circuits of moderate negation width w=n^{epsilon} for an arbitrarily small constant epsilon>0 can be even exponentially stronger than monotone circuits.
We show that the size of any circuit of negation width w computing f is roughly at least the minimum size of a monotone circuit computing f divided by K=min{w^m,m^w}, where m is the maximum length of a prime implicant of f. We also show that the depth of any circuit of negation width w computing f is roughly at least the minimum depth of a monotone circuit computing f minus log K. Finally, we show that formulas of bounded negation width can be balanced to achieve a logarithmic (in their size) depth without increasing their negation width
Learning in Parallel
In this paper, we extend Valiant's sequential model of concept learning from
examples [Valiant 1984] and introduce models for the e cient learning of concept classes
from examples in parallel. We say that a concept class is NC-learnable if it can be learned
in polylog time with a polynomial number of processors. We show that several concept
classes which are polynomial-time learnable are NC-learnable in constant time. Some other
classes can be shown to be NC-learnable in logarithmic time, but not in constant time.
Our main result shows that other classes, such as s-fold unions of geometrical objects in
Euclidean space, which are polynomial-time learnable by a greedy set cover technique,
are NC-learnable using a non-greedy technique. We also show that (unless P RNC)
several polynomial-time learnable concept classes related to linear programming are not
NC-learnable. Equivalence of various parallel learning models and issues of fault-tolerance
are also discussed
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