Ultra-low Voltage Digital Circuits and Extreme Temperature Electronics Design

Certain applications require digital electronics to operate under extreme conditions e.g., large swings in ambient temperature, very low supply voltage, high radiation. Such applications include sensor networks, wearable electronics, unmanned aerial vehicles, spacecraft, and energyharvesting systems. This dissertation splits into two projects that study digital electronics supplied by ultra-low voltages and build an electronic system for extreme temperatures. The first project introduces techniques that improve circuit reliability at deep subthreshold voltages as well as determine the minimum required supply voltage. These techniques address digital electronic design at several levels: the physical process, gate design, and system architecture. This dissertation analyzes a silicon-on-insulator process, Schmitt-trigger gate design, and asynchronous logic at supply voltages lower than 100 millivolts. The second project describes construction of a sensor digital controller for the lunar environment. Parts of the digital controller are an asynchronous 8031 microprocessor that is compatible with synchronous logic, memory with error detection and correction, and a robust network interface. The digitial sensor ASIC is fabricated on a silicon-germanium process and built with cells optimized for extreme temperatures

Power Efficient Data-Aware SRAM Cell for SRAM-Based FPGA Architecture

The design of low-power SRAM cell becomes a necessity in today\u27s FPGAs, because SRAM is a critical component in FPGA design and consumes a large fraction of the total power. The present chapter provides an overview of various factors responsible for power consumption in FPGA and discusses the design techniques of low-power SRAM-based FPGA at system level, device level, and architecture levels. Finally, the chapter proposes a data-aware dynamic SRAM cell to control the power consumption in the cell. Stack effect has been adopted in the design to reduce the leakage current. The various peripheral circuits like address decoder circuit, write/read enable circuits, and sense amplifier have been modified to implement a power-efficient SRAM-based FPGA

Design and Analysis of an Asynchronous Microcontroller

This dissertation presents the design of the most complex MTNCL circuit to date. A fully functional MTNCL MSP430 microcontroller is designed and benchmarked against an open source synchronous MSP430. The designs are compared in terms of area, active energy, and leakage energy. Techniques to reduce MTNCL pipeline activity and improve MTNCL register file area and power consumption are introduced. The results show the MTNCL design to have superior leakage power characteristics. The area and active energy comparisons highlight the need for better MTNCL logic synthesis techniques

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

Microbial Load Monitor

The Microbial Load Monitor (MLM) is an automated and computerized system for detection and identification of microorganisms. Additionally, the system is designed to enumerate and provide antimicrobic susceptibility profiles for medically significant bacteria. The system is designed to accomplish these tasks in a time of 13 hours or less versus the traditional time of 24 hours for negatives and 72 hours or more for positives usually required for standard microbiological analysis. The MLM concept differs from other methods of microbial detection in that the system is designed to accept raw untreated clinical samples and to selectively identify each group or species that may be present in a polymicrobic sample

Scoping of a commercial micro reformer for the production of hydrogen

Hydrogen has gained interest as fuel recently as the harmful effects of fossil fuels on the environment can no longer be ignored. Hydrogen, which produces no pollutants, forms the feed for cleaner fuel cells systems currently in use. Fuel cells, although not as economically viable as fossil fuels, have found a foothold in the energy market in various markets like power backup and use in remote locations. Production of hydrogen is still largely done via fossil fuel reforming and this technology has received renewed interest for use with fuel cells in the form of micro- reformers or fuel processors. This study entailed the performance benchmarking of a so called Best-in-Class commercial micro reformer (as available in 2010), the 1 kW WS FLOX Reformer, and was undertaken under the auspices of the national HySA programme. The study’s focus was primarily on reformate output quality (carbon monoxide concentration), and start up time, thermal efficiency and hydrogen output (15 SCLM). The reformer consisted of a combustion section encased in an outer reforming section consisting of three reactors in series, steam reforming, water gas shift and selective methanation. As-provided temperature control is simplified though the use of only one temperature setpoint in the combustion chamber and temperature control in the CO clean up stages obtained through means of heat transfer with incoming water being evaporated. Combustion takes place through flame combustion or by means of the supplier’s patented FLOX (flameless oxidation) combustion. The purchased FLOX Reformer assembly was integrated into a fully automated unit with all balance of plant components as well as microGC and flue gas analysis for measurement of outlet conditions. The FLOX Reformer was tested at multiple combustion temperatures, combustion flowrates, reforming loads and steam-to-carbon ratios to obtain a wide set of benchmark data. From the testing it was found that the reformer was able to produce the necessary 15 SCLM hydrogen with a carbon monoxide purity of less than 10 ppm as required in fuel cells for all testing if the reaction temperatures were within the recommended limits. Intermediary water gas shift analysis showed methane and carbon monoxide conversion in the reforming and water gas shift stages to be identical to thermodynamic equilibrium conversion – 95% and higher for all temperatures. iii Selective methanation conversion obtained was 99%, but not always at equilibrium conversion due to increased selective methanation temperatures, where carbon dioxide methanation was also observed at the higher temperatures. Temperature control through heat exchange with incoming water in the CO removal stages was found to be less than ideal as the temperature inside these stages fluctuated dramatically due to inaccuracies in the water pump and a lagged response to flowrate changes. Startup times of less than an hour was observed for multiple combustion flowrates and the reformer boasts a standby function to reduce this to less than half an hour. The thermal efficiency was independently confirmed and tested and found to be higher than 70 % for flame combustion and on par with other commercially available fuel processors. The suppliers trademark FLOX combustion only reaching 65% due to decreased combustion efficiency

Design and Field Test of a WSN Platform Prototype for Long-Term Environmental Monitoring

Long-term wildfire monitoring using distributed in situ temperature sensors is an accurate, yet demanding environmental monitoring application, which requires long-life, low-maintenance, low-cost sensors and a simple, fast, error-proof deployment procedure. We present in this paper the most important design considerations and optimizations of all elements of a low-cost WSN platform prototype for long-term, low-maintenance pervasive wildfire monitoring, its preparation for a nearly three-month field test, the analysis of the causes of failure during the test and the lessons learned for platform improvement. The main components of the total cost of the platform (nodes, deployment and maintenance) are carefully analyzed and optimized for this application. The gateways are designed to operate with resources that are generally used for sensor nodes, while the requirements and cost of the sensor nodes are significantly lower. We define and test in simulation and in the field experiment a simple, but effective communication protocol for this application. It helps to lower the cost of the nodes and field deployment procedure, while extending the theoretical lifetime of the sensor nodes to over 16 years on a single 1 Ah lithium battery

Design of Logic-Compatible Embedded Flash Memories for Moderate Density On-Chip Non-Volatile Memory Applications

University of Minnesota Ph.D. dissertation. December 2013. Major: Electrical Engineering. Advisor: Chris H. Kim. 1 computer file (PDF); xx, 129 pages.An on-chip embedded NVM (eNVM) enables a zero-standby power system-on-a-chip with a smaller form factor, faster access speed, lower access power, and higher security than an off-chip NVM. Differently from the high density eNVM technologies such as dual-poly eflash, FeRAM, STT-MRAM, and RRAM that typically require process overhead beyond standard logic process, the moderate density eNVM technologies such as e-fuse, anti-fuse, and single-poly embedded flash (eflash) can be fabricated in a standard logic process with no process overhead. Among them, a single-poly eflash is a unique multiple-time programmable moderate density eNVM, while it is expected to play a key role in mitigating variability and reliability issues of the future VLSI technologies; however, the challenges such as a high voltage disturbance, an implementation of logic compatible High Voltage Switch (HVS), and a limited sensing margin are required to be solved for its implementation using a standard I/O device. This thesis focuses on alleviating such challenges of the single-poly eflash memory with three single-poly eflash designs proposed in a generic logic process for moderate density eNVM applications. Firstly, the proposed 5T eflash features a WL-by-WL accessible architecture with no disturbance issue of the unselected WL cells, an overstress-free multi-story HVS expanding the cell sensing margin, and a selective WL refresh scheme for the higher cell endurance. The most favorable eflash cell configuration is also studied when the performance, endurance, retention, and disturbance characteristics are all considered. Secondly, the proposed 6T eflash features the bit-by-bit re-write capability for the higher overall cell endurance, while not disturbing the unselected WL cells. The logic compatible on-chip charge pump to provide the appropriate high voltages for the proposed eflash operations is also discussed. Finally, the proposed 10T eflash features a multi-configurable HVS that does not require the boosted read supplies, and a differential cell architecture with improved retention time. All these proposed eflash memories were implemented in a 65nm standard logic process, and the test chip measurement results confirmed the functionality of the proposed designs with a reasonable retention margin, showing the competitiveness of the proposed eflash memories compared to the other moderate density eNVM candidates

Circuits and Systems for Energy Harvesting and Internet of Things Applications

The Internet of Things (IoT) continues its growing trend, while new “smart” objects are con-stantly being developed and commercialized in the market. Under this paradigm, every common object will be soon connected to the Internet: mobile and wearable devices, electric appliances, home electronics and even cars will have Internet connectivity. Not only that, but a variety of wireless sensors are being proposed for different consumer and industrial applications. With the possibility of having hundreds of billions of IoT objects deployed all around us in the coming years, the social implications and the economic impact of IoT technology needs to be seriously considered. There are still many challenges, however, awaiting a solution in order to realize this future vision of a connected world. A very important bottleneck is the limited lifetime of battery powered wireless devices. Fully depleted batteries need to be replaced, which in perspective would generate costly maintenance requirements and environmental pollution. However, a very plausible solution to this dilemma can be found in harvesting energy from the ambient. This dissertation focuses in the design of circuits and system for energy harvesting and Internet of Things applications. The first part of this dissertation introduces the research motivation and fundamentals of energy harvesting and power management units (PMUs). The architecture of IoT sensor nodes and PMUs is examined to observe the limitations of modern energy harvesting systems. Moreover, several architectures for multisource harvesting are reviewed, providing a background for the research presented here. Then, a new fully integrated system architecture for multisource energy harvesting is presented. The design methodology, implementation, trade-offs and measurement results of the proposed system are described. The second part of this dissertation focus on the design and implementation of low-power wireless sensor nodes for precision agriculture. First, a sensor node incorporating solar energy harvesting and a dynamic power management strategy is presented. The operation of a wireless sensor network for soil parameter estimation, consisting of four nodes is demonstrated. After that, a solar thermoelectric generator (STEG) prototype for powering a wireless sensor node is proposed. The implemented solar thermoelectric generator demonstrates to be an alternative way to harvest ambient energy, opening the possibility for its use in agricultural and environmental applications. The open problems in energy harvesting for IoT devices are discussed at the end, to delineate the possible future work to improve the performance of EH systems. For all the presented works, proof-of-concept prototypes were fabricated and tested. The measured results are used to verify their correct operation and performance