Frequency filters with OTA amplifiers

Práce je zaměřena na problematiku kmitočtových filtrů s OTA zesilovači. Analyzuje návrhy kmitočtových filtrů 2.řádu s OTA zesilovači a kmitočtové filtry vyšších řádů. Řeší návrh multifunkčního kmitočtového filtru 2.řádu s třemi OTA zesilovači v napěťovém režimu, s podporou počítačových metod návrhu a jeho realizaci. Stanovuje přenosové funkce navrženého filtru a simuluje jeho přenosové kmitočtové charakteristiky. Navržený kmitočtový filtru realizuje a experimentálně ověřuje jeho vlastnosti. Výsledky porovnává s teoreticky získanými hodnotami počítačovou simulací.Work is bent on problems frequency-selection filter with OTA amplifier. Analyses suggestions frequency-selection filter 2.order with OTA amplifier plus frequency-selection filter highers order. Smoothing - out proposal multifunction frequency-selection filter 2.order with by three OTA amplifier in suspense regime, with the support computer methods proposal plus his realization. Establishes temporary carrier function designed filter command plus malingers his temporary carrier frequency characteristics. Designed frequency-selection filter implements plus experimentally checks his characteristics. Record confront with abstractedly gained values computer malingering.

Nonlinearity and noise modeling of operational transconductance amplifiers for continuous time analog filters

A general framework for performance optimization of continuous-time OTA-C (Operational Transconductance Amplifier-Capacitor) filters is proposed. Efficient procedures for evaluating nonlinear distortion and noise valid for any filter of arbitrary order are developed based on the matrix description of a general OTA-C filter model . Since these procedures use OTA macromodels, they can be used to obtain the results significantly faster than transistor-level simulation. In the case of transient analysis, the speed-up may be as much as three orders of magnitude without almost no loss of accuracy. This makes it possible to carry out direct numerical optimization of OTA-C filters with respect to important characteristics such as noise performance, THD, IM3, DR or SNR. On the other hand, the general OTA-C filter model allows us to apply matrix transforms that manipulate (rescale) filter element values and/or change topology without changing its transfer function. The above features are a basis to build automated optimization procedures for OTA-C filters. In particular, a systematic optimization procedure using equivalence transformations is proposed. The research also proposes suitable software implementations of the optimization process. The first part of the research proposes a general performance optimization procedure and to verify the process two application type examples are mentioned. An application example of the proposed approach to optimal block sequencing and gain distribution of 8th order cascade Butterworth filter (for two variants of OTA topologies) is given. Secondly the modeling tool is used to select the best suitable topology for a 5th order Bessel Low Pass Filter. Theoretical results are verified by comparing to transistor-level simulation withCADENCE. For the purpose of verification, the filters have also been fabricated in standard 0.5mm CMOS process. The second part of the research proposes a new linearization technique to improve the linearity of an OTA using an Active Error Feedforward technique. Most present day applications require very high linear circuits combined with low noise and low power consumption. An OTA based biquad filter has also been fabricated in 0.35mm CMOS process. The measurement results for the filter and the stand alone OTA have been discussed. The research focuses on these issues

CMOS current amplifiers : speed versus nonlinearity

This work deals with analogue integrated circuit design using various types of current-mode amplifiers. These circuits are analysed and realised using modern CMOS integration technologies. The dynamic nonlinearities of these circuits are discussed in detail as in the literature only linear nonidealities and static nonlinearities are conventionally considered. For the most important open-loop current-mode amplifier, the second-generation current-conveyor (CCII), a macromodel is derived that, unlike other reported macromodels, can accurately predict the common-mode behaviour in differential applications. Similarly, this model is used to describe the nonidealities of several other current-mode amplifiers because similar circuit structures are common in such amplifiers. With modern low-voltage CMOS-technologies, the current-mode operational amplifier and the high-gain current-conveyor (CCII∞) perform better than open-loop current-amplifiers. Similarly, unlike with conventional voltage-mode operational amplifiers, the large-signal settling behaviour of these two amplifier types does not degrade as CMOS-processes are scaled down. In this work, two 1 MHz 3rd -order low-pass continuous-time filters are realised with a 1.2 μm CMOS-process. These filters use a differential CCII∞ with linearised, dynamically biased output stages resulting in performance superior to most OTA-C filter realisations reported. Similarly, two logarithmic amplifier chips are designed and fabricated. The first circuit, implemented with a 1.2 μm BiCMOS-process, uses again a CCII∞. This circuit uses a pn-junction as a logarithmic feedback element. With a CCII∞ the constant gain-bandwidth product, typical of voltage-mode operational amplifiers, is avoided resulting in a constant 1 MHz bandwidth with a 60 dB signal amplitude range. The second current-mode logarithmic amplifier, based on piece-wise linear approximation of the logarithmic function by a cascade of limiting current amplifier stages, is realised in a standard 1.2 μm CMOS-process. The limiting level in these current amplifiers is less sensitive to process variation than in limiting voltage amplifiers resulting in exceptionally low temperature dependency of the logarithmic output signal. Additionally, along with this logarithmic amplifier a new current peak detectoris developed.reviewe

High performance RF and baseband building blocks for wireless receivers

Because of the unique architecture of wireless receivers, a designer must understand both the high frequency aspects as well as the low-frequency analog considerations for different building blocks of the receiver. The primary goal of this research work is to explore techniques for implementing high performance RF and baseband building blocks for wireless applications. Several novel techniques to improve the performance of analog building blocks are presented. An enhanced technique to couple two LC resonators is presented which does not degrade the loaded quality factor of the resonators which results in an increased dynamic range. A novel technique to automatically tune the quality factor of LC resonators is presented. The proposed scheme is stable and fast and allows programming both the quality factor and amplitude response of the LC filter. To keep the oscillation amplitude of LC VCOs constant and thus achieving a minimum phase noise and a reliable startup, a stable amplitude control loop is presented. The proposed scheme has been also used in a master-slave quality factor tuning of LC filters. An efficient and low-cost architecture for a 3.1GHz-10.6GHz ultra-wide band frequency synthesizer is presented. The proposed scheme is capable of generating 14A novel pseudo-differential transconductance amplifier is presented. The proposed scheme takes advantage of the second-order harmonic available at the output current of pseudo-differential structure to cancel the third-order harmonic distortion. A novel nonlinear function is proposed which inherently removes the third and the fifth order harmonics at its output signal. The proposed nonlinear block is used in a bandpass-based oscillator to generate a highly linear sinusoidal output. Finally, a linearized BiCMOS transconductance amplifier is presented. This transconductance is used to build a third-order linear phase low pass filter with a cut-off frequency of 264MHz for an ultra-wide band receiver. carrier frequencies

High performance continuous-time filters for information transfer systems

Vast attention has been paid to active continuous-time filters over the years. Thus as the cheap, readily available integrated circuit OpAmps replaced their discrete circuit versions, it became feasible to consider active-RC filter circuits using large numbers of OpAmps. Similarly the development of integrated operational transconductance amplifier (OTA) led to new filter configurations. This gave rise to OTA-C filters, using only active devices and capacitors, making it more suitable for integration. The demands on filter circuits have become ever more stringent as the world of electronics and communications has advanced. In addition, the continuing increase in the operating frequencies of modern circuits and systems increases the need for active filters that can perform at these higher frequencies; an area where the LC active filter emerges. What mainly limits the performance of an analog circuit are the non-idealities of the used building blocks and the circuit architecture. This research concentrates on the design issues of high frequency continuous-time integrated filters. Several novel circuit building blocks are introduced. A novel pseudo-differential fully balanced fully symmetric CMOS OTA architecture with inherent common-mode detection is proposed. Through judicious arrangement, the common-mode feedback circuit can be economically implemented. On the level of system architectures, a novel filter low-voltage 4th order RF bandpass filter structure based on emulation of two magnetically coupled resonators is presented. A unique feature of the proposed architecture is using electric coupling to emulate the effect of the coupled-inductors, thus providing bandwidth tuning with small passband ripple. As part of a direct conversion dual-mode 802.11b/Bluetooth receiver, a BiCMOS 5th order low-pass channel selection filter is designed. The filter operated from a single 2.5V supply and achieves a 76dB of out-of-band SFDR. A digital automatic tuning system is also implemented to account for process and temperature variations. As part of a Bluetooth transmitter, a low-power quadrature direct digital frequency synthesizer (DDFS) is presented. Piecewise linear approximation is used to avoid using a ROM look-up table to store the sine values in a conventional DDFS. Significant saving in power consumption, due to the elimination of the ROM, renders the design more suitable for portable wireless communication applications

A 200-MHz fully-differential CMOS front-end with an on-chip inductor for magnetic resonance imaging

Recently, there is a growing interest in applying electronic circuit design for biomedical applications, especially in the area of nuclear magnetic resonance (NMR). NMR has been used for many years as a spectroscopy technique for analytical chem- istry. Previous studies have demonstrated the design and fabrication of planar spiral inductors (microcoils) that serve as detectors for nuclear magnetic resonance mi- crospectroscopy. The goal of this research was to analyze, design, and test a prototype integrated sensor, which consisted of a similar microcoil detector with analog components to form a multiple-channel front-end for a magnetic resonance imaging (MRI) system to perform microspectroscopy. The research has succeeded in producing good function- ality for a multiple-channel sensor. The sensor met expectations compared to similar one-channel systems through experiments in channel separation and good signal-to- noise ratios

Design of custom CMOS amplifiers for nanoscale bio-interfaces

The miniaturization of electronics is a technique that holds a lot of potential in improving system performance in a variety of applications. The simultaneous miniaturization of sensors into the nano-scale has provided new ways to probe biological systems. Careful co-design of these electronics and sensors can unlock measurements and experiments that would otherwise be impossible to achieve. This thesis describes the design of two such instrumentation amplifiers and shows that significant gains in temporal resolution and noise performance are possible through careful optimization. A custom integrated amplifier is developed for improving the temporal resolution in nanopore recordings. The amplifier is designed in a commercial 0.18 μm complementary metal-oxide-semiconductor (CMOS) process. A platform is then built with the amplifier at its core that integrates glass-passivated solid-state nanopores to achieve measurement bandwidth over an order of magnitude greater than the state of the art. The use of wavelet transforms for denoising the data and further improving the signal-to-noise ratio (SNR) is then explored. A second amplifier is designed in a 0.18 μm CMOS process for intracellular recordings from neurons. The amplifier contains all the compensation circuitry required for canceling the effects of the electrode non-idealities. Compared to equivalent commercial systems and the state of the art, the amplifier performs comparably or better while consuming orders of magnitude lower power. These systems can inform the design of extremely miniaturized application-specific integrated amplifiers of the future

Electronics for Sensors

The aim of this Special Issue is to explore new advanced solutions in electronic systems and interfaces to be employed in sensors, describing best practices, implementations, and applications. The selected papers in particular concern photomultiplier tubes (PMTs) and silicon photomultipliers (SiPMs) interfaces and applications, techniques for monitoring radiation levels, electronics for biomedical applications, design and applications of time-to-digital converters, interfaces for image sensors, and general-purpose theory and topologies for electronic interfaces