Flexible digital modulation and coding synthesis for satellite communications

An architecture and a hardware prototype of a flexible trellis modem/codec (FTMC) transmitter are presented. The theory of operation is built upon a pragmatic approach to trellis-coded modulation that emphasizes power and spectral efficiency. The system incorporates programmable modulation formats, variations of trellis-coding, digital baseband pulse-shaping, and digital channel precompensation. The modulation formats examined include (uncoded and coded) binary phase shift keying (BPSK), quatenary phase shift keying (QPSK), octal phase shift keying (8PSK), 16-ary quadrature amplitude modulation (16-QAM), and quadrature quadrature phase shift keying (Q squared PSK) at programmable rates up to 20 megabits per second (Mbps). The FTMC is part of the developing test bed to quantify modulation and coding concepts

Adaptive weighted least squares algorithm for Volterra signal modeling

Published versio

Bounds and Simulation Results of 32-ary and 64-ary Quadrature Amplitude Modulation for Broadband-ISDN via Satellite

Union bounds and Monte Carlo simulation Bit-Error-Rate (BER) performance results are presented for various 32-ary and 64-ary Quadrature Amplitude Modulation (QAM) schemes. Filtered and unfiltered modulation formats are compared for the best packing arrangement in peak power limited systems. It is verified that circular constellations which populate as many symbols as possible at the peak magnitude offer the best performance. For example: a 32-ary QAM scheme based on concentric circles offers about 1.05 dB better peak power improvement at a BER of 10(exp -6) over the scheme optimized for average power using triangular symbol packing. This peak power improvement increases to 1.25 dB for comparable 64-ary QAM schemes. This work serves as a precursor to determine the feasibility of a combined modem/codec that can accommodate Broadband Integrated Services Digital Network (B-ISDN) at a rate of 155.52 Mbps through typical transponder bandwidths of 36 MHz and 54 MHz

Nonlinear system identification using deterministic multilevel sequences

Bu çalışmada sınırlı doğrusalsızlık derecesine sahip Volterra süzgeçleri için yeni bir gösterilim geliştirilmektedir. Bu gösterilim kullanılarak Volterra süzgeçleri için kesin bir tanılama yöntemi sunulmaktadır. Bu yeni yöntem, giriş işareti olarak farklı seviyelere sahip impulslardan oluşan gerekirci diziler kullanmaktadır. Yeni tanılama yöntemi doğrusal, zamanla-değişmez sistemlerdeki birim impuls cevabının doğrusal olmayan sistemlere başarılı bir uyarlaması olarak düşünülebilir. Çalışmada sunulan tanılama yöntemi kesindir; böylece gözlem gürültüsü olmadığında Volterra çekirdeklerini hatasız kestirmektedir. Bilgisayar benzetimleriyle tanılama yönteminin literatürde yakın zamanda sunulmuş olan yöntemlerden daha iyi kestirim sonuçları verdiği gösterilmiştir.Anahtar Kelimeler: Doğrusal olmayan sistem tanılama, Volterra süzgeçleri.In this paper we develop a new representation for the finite-order Volterra filters. This representation introduces a novel partitioning of the Volterra kernels.Using this representation, we formulate a novel exact identification method for Volterra filters, which uses deterministic sequences consisting of impulses with distinct levels. The identification method might be considered as a successful extension of the impulse response of the linear, time-invariant systems to the realm of nonlinear systems. The developed method indeed includes identification using the unit impulse response as a subcase when the system under consideration is a linear system. Our identification method is exact; hence, it calculates the exact Volterra kernels in the absence of noise for very short length input sequences. Our method calculates each Volterra kernel individually. The kernel estimates are not utilized in the calculation of further kernel estimates. This property hinders error propagation among kernel estimates. Our method calculates directly the Volterra kernels, instead of calculating first some intermediary representation such as the Wiener kernels, which do not have any directly interpretable results. Our method does not introduce and identify any kernels which are redundant for the regular Volterra filter. We demonstrate with simulations that the identification algorithm can produce better parameter estimates than some most recent algorithms in the literature. Keywords: Nonlinear system identification, Volterra filters

Experimental Results and Issues on Equalization for Nonlinear Memory Channel: Pre-Cursor Enhanced Ram-DFE Canceler

This thesis investigates the effects of the High Power Amplifier (HPA) and the filters over a satellite or telemetry channel. The Volterra series expression is presented for the nonlinear channel with memory, and the algorithm is based on the finite-state machine model. A RAM-based algorithm operating on the receiver side, Pre-cursor Enhanced RAM-FSE Canceler (PERC) is developed. A high order modulation scheme , 16-QAM is used for simulation, the results show that PERC provides an efficient and reliable method to transmit data on the bandlimited nonlinear channel. The contribution of PERC algorithm is that it includes both pre-cursors and post-cursors as the RAM address lines, and suggests a new way to make decision on the pre-addresses. Compared with the RAM-DFE structure that only includes post- addresses, the BER versus Eb/NO performance of PERC is substantially enhanced. Experiments are performed for PERC algorithms with different parameters on AWGN channels, and the results are compared and analyzed. The investigation of this thesis includes software simulation and hardware verification. Hardware is setup to collect actual TWT data. Simulation on both the software-generated data and the real-world data are performed. Practical limitations are considered for the hardware collected data. Simulation results verified the reliability of the PERC algorithm. This work was conducted at NMSU in the Center for Space Telemetering and Telecommunications Systems in the Klipsch School of Electrical and Computer Engineering Department

An implementation of the redirected learning architecture for digital pre-distortion

Digital pre-distortion is a digital signal processing technique that\u27s used to linearize the output of various systems. A common application of digital pre-distortion is to linearize microwave power amplifier circuits, because non-linear distortion can lead to inefficient performance and out of band emissions. Since its conception, several different architectures have been developed for digital pre-distortion. There are online architectures, such as the indirect learning architecture, where signal processing is done while the amplifier is running. There are also offline architectures, such as the direct learning architecture and the relatively new redirected learning architecture, where the signal processing is done using previous input and output data from the amplifier to create a pre-distorted signal. The choice of which architecture to use often comes down to a trade off between performance and complexity. However, a common problem exists between these architectures; the complexity of the pre-distortion technique is bound to the complexity of the system\u27s architecture. Most digital pre-distortion systems in use today use Volterra series filters and their derivatives for behavioral modeling or simple look-up tables. The complexity of applying a given behavioral model to an input signal varies little between architectures, so for a given model the question becomes which architecture will yield the greatest performance. Online methods have excellent performance, though the system required to train the models is computationally complex, as the algorithms to implement them require many calculations in a short period of time; whereas offline methods do not require an expensive training system but may not perform as well. For this reason, it is often desirable to use offline methods to save on system costs and engineering time. Most offline digital pre-distortion systems use the direct learning architecture, however newer architectures may be able to outperform the direct learning architecture with a given behavioral model.In this thesis it is shown how the redirected learning architecture was used to mitigate harmonic distortion by about 30~dB more than the indirect learning architecture. The direct, indirect, and redirected learning architectures are presented, as well as various behavioral models. This is followed by an analysis of the redirected learning architecture. Finally an implementation of the redirected learning model is presented using ADS-Matlab co-simulation. The results are then discussed to show the potential of the redirected learning method

Digital Front-End Signal Processing with Widely-Linear Signal Models in Radio Devices

Necessitated by the demand for ever higher data rates, modern communications waveforms have increasingly wider bandwidths and higher signal dynamics. Furthermore, radio devices are expected to transmit and receive a growing number of different waveforms from cellular networks, wireless local area networks, wireless personal area networks, positioning and navigation systems, as well as broadcast systems. On the other hand, commercial wireless devices are expected to be cheap, be relatively small in size, and have a long battery life. The demands for flexibility and higher data rates on one hand, and the constraints on production cost, device size, and energy efficiency on the other, pose difficult challenges on the design and implementation of future radio transceivers. Under these diametric constraints, in order to keep the overall implementation cost and size feasible, the use of simplified radio architectures and relatively low-cost radio electronics are necessary. This notion is even more relevant for multiple antenna systems, where each antenna has a dedicated radio front-end. The combination of simplified radio front-ends and low-cost electronics implies that various nonidealities in the remaining analog radio frequency (RF) modules, stemming from unavoidable physical limitations and material variations of the used electronics, are expected to play a critical role in these devices. Instead of tightening the specifications and tolerances of the analog circuits themselves, a more cost-effective solution in many cases is to compensate for these nonidealities in the digital domain. This line of research has been gaining increasing interest in the last 10-15 years, and is also the main topic area of this work. The direct-conversion radio principle is the current and future choice for building low-cost but flexible, multi-standard radio transmitters and receivers. The direct-conversion radio, while simple in structure and integrable on a single chip, suffers from several performance degrading circuit impairments, which have historically prevented its use in wideband, high-rate, and multi-user systems. In the last 15 years, with advances in integrated circuit technologies and digital signal processing, the direct-conversion principle has started gaining popularity. Still, however, much work is needed to fully realize the potential of the direct-conversion principle. This thesis deals with the analysis and digital mitigation of the implementation nonidealities of direct-conversion transmitters and receivers. The contributions can be divided into three parts. First, techniques are proposed for the joint estimation and predistortion of in-phase/quadrature-phase (I/Q) imbalance, power amplifier (PA) nonlinearity, and local oscillator (LO) leakage in wideband direct-conversion transmitters. Second, methods are developed for estimation and compensation of I/Q imbalance in wideband direct-conversion receivers, based on second-order statistics of the received communication waveforms. Third, these second-order statistics are analyzed for second-order stationary and cyclostationary signals under several other system impairments related to circuit implementation and the radio channel. This analysis brings new insights on I/Q imbalances and their compensation using the proposed algorithms. The proposed algorithms utilize complex-valued signal processing throughout, and naturally assume a widely-linear form, where both the signal and its complex-conjugate are filtered and then summed. The compensation processing is situated in the digital front-end of the transceiver, as the last step before digital-to-analog conversion in transmitters, or in receivers, as the first step after analog-to-digital conversion. The compensation techniques proposed herein have several common, unique, attributes: they are designed for the compensation of frequency-dependent impairments, which is seen critical for future wideband systems; they require no dedicated training data for learning; the estimators are computationally efficient, relying on simple signal models, gradient-like learning rules, and solving sets of linear equations; they can be applied in any transceiver type that utilizes the direct-conversion principle, whether single-user or multi-user, or single-carrier or multi-carrier; they are modulation, waveform, and standard independent; they can also be applied in multi-antenna transceivers to each antenna subsystem separately. Therefore, the proposed techniques provide practical and effective solutions to real-life circuit implementation problems of modern communications transceivers. Altogether, considering the algorithm developments with the extensive experimental results performed to verify their functionality, this thesis builds strong confidence that low-complexity digital compensation of analog circuit impairments is indeed applicable and efficient

Nonlinear Distortion in Wideband Radio Receivers and Analog-to-Digital Converters: Modeling and Digital Suppression

Emerging wireless communications systems aim to flexible and efficient usage of radio spectrum in order to increase data rates. The ultimate goal in this field is a cognitive radio. It employs spectrum sensing in order to locate spatially and temporally vacant spectrum chunks that can be used for communications. In order to achieve that, flexible and reconfigurable transceivers are needed. A software-defined radio can provide these features by having a highly-integrated wideband transceiver with minimum analog components and mostly relying on digital signal processing. This is also desired from size, cost, and power consumption point of view. However, several challenges arise, from which dynamic range is one of the most important. This is especially true on receiver side where several signals can be received simultaneously through a single receiver chain. In extreme cases the weakest signal can be almost 100 dB weaker than the strongest one. Due to the limited dynamic range of the receiver, the strongest signals may cause nonlinear distortion which deteriorates spectrum sensing capabilities and also reception of the weakest signals. The nonlinearities are stemming from the analog receiver components and also from analog-to-digital converters (ADCs). This is a performance bottleneck in many wideband communications and also radar receivers. The dynamic range challenges are already encountered in current devices, such as in wideband multi-operator receiver scenarios in mobile networks, and the challenges will have even more essential role in the future.This thesis focuses on aforementioned receiver scenarios and contributes to modeling and digital suppression of nonlinear distortion. A behavioral model for direct-conversion receiver nonlinearities is derived and it jointly takes into account RF, mixer, and baseband nonlinearities together with I/Q imbalance. The model is then exploited in suppression of receiver nonlinearities. The considered method is based on adaptive digital post-processing and does not require any analog hardware modification. It is able to extract all the necessary information directly from the received waveform in order to suppress the nonlinear distortion caused by the strongest blocker signals inside the reception band.In addition, the nonlinearities of ADCs are considered. Even if the dynamic range of the analog receiver components is not limiting the performance, ADCs may cause considerable amount of nonlinear distortion. It can originate, e.g., from undeliberate variations of quantization levels. Furthermore, the received waveform may exceed the nominal voltage range of the ADC due to signal power variations. This causes unintentional signal clipping which creates severe nonlinear distortion. In this thesis, a Fourier series based model is derived for the signal clipping caused by ADCs. Furthermore, four different methods are considered for suppressing ADC nonlinearities, especially unintentional signal clipping. The methods exploit polynomial modeling, interpolation, or symbol decisions for suppressing the distortion. The common factor is that all the methods are based on digital post-processing and are able to continuously adapt to variations in the received waveform and in the receiver itself. This is a very important aspect in wideband receivers, especially in cognitive radios, when the flexibility and state-of-the-art performance is required