Ion extraction capabilities of two-grid accelerator systems

An experimental investigation into the ion extraction capabilities of two-grid accelerator systems common to electrostatic ion thrusters is described. This work resulted in a large body of experimental data which facilitates the selection of the accelerator system geometries and operating parameters necessary to maximize the extracted ion current. Results suggest that the impingement-limited perveance is not dramatically affected by reductions in screen hole diameter to 0.5 mm. Impingement-limited performance is shown to depend most strongly on grid separation distance, accelerator hole diameter ratio, the discharge-to-total accelerating voltage ratio, and the net-to-total accelerating voltage ratio. Results obtained at small grid separation ratios suggest a new grid operating condition where high beam current per hole levels are achieved at a specified net accelerating voltage. It is shown that this operating condition is realized at an optimum ratio of net-to-total accelerating voltage ratio which is typically quite high. The apparatus developed for this study is also shown to be well suited measuring the electron backstreaming and electrical breakdown characteristics of two-grid accelerator systems

Accelerator system and method of accelerating particles

An accelerator system and method that utilize dust as the primary mass flux for generating thrust are provided. The accelerator system can include an accelerator capable of operating in a self-neutralizing mode and having a discharge chamber and at least one ionizer capable of charging dust particles. The system can also include a dust particle feeder that is capable of introducing the dust particles into the accelerator. By applying a pulsed positive and negative charge voltage to the accelerator, the charged dust particles can be accelerated thereby generating thrust and neutralizing the accelerator system

Initial Flow Matching Results of MHD Energy Bypass on a Supersonic Turbojet Engine Using the Numerical Propulsion System Simulation (NPSS) Environment

Preliminary flow matching has been demonstrated for a MHD energy bypass system on a supersonic turbojet engine. The Numerical Propulsion System Simulation (NPSS) environment was used to perform a thermodynamic cycle analysis to properly match the flows from an inlet to a MHD generator and from the exit of a supersonic turbojet to a MHD accelerator. Working with various operating conditions such as the enthalpy extraction ratio and isentropic efficiency of the MHD generator and MHD accelerator, interfacing studies were conducted between the pre-ionizers, the MHD generator, the turbojet engine, and the MHD accelerator. This paper briefly describes the NPSS environment used in this analysis and describes the NPSS analysis of a supersonic turbojet engine with a MHD generator/accelerator energy bypass system. Results from this study have shown that using MHD energy bypass in the flow path of a supersonic turbojet engine increases the useful Mach number operating range from 0 to 3.0 Mach (not using MHD) to an explored and desired range of 0 to 7.0 Mach

AMC: Advanced Multi-accelerator Controller

The rapid advancement, use of diverse architectural features and introduction of High Level Synthesis (HLS) tools in FPGA technology have enhanced the capacity of data-level parallelism on a chip. A generic FPGA based HLS multi-accelerator system requires a microprocessor (master core) that manages memory and schedules accelerators. In a real environment, such HLS multi-accelerator systems do not give a perfect performance due to memory bandwidth issues. Thus, a system demands a memory manager and a scheduler that improves performance by managing and scheduling the multi-accelerator’s memory access patterns efficiently. In this article, we propose the integration of an intelligent memory system and efficient scheduler in the HLS-based multi-accelerator environment called Advanced Multi-accelerator Controller (AMC). The AMC system is evaluated with memory intensive accelerators, High Performance Computing (HPC) applications and implemented and tested on a Xilinx Virtex-5 ML505 evaluation FPGA board. The performance of the system is compared against the microprocessor-based systems that have been integrated with the operating system. Results show that the AMC based HLS multi-accelerator system achieves 10.4x and 7x of speedup compared to the MicroBlaze and Intel Core based HLS multi-accelerator systems.Peer ReviewedPostprint (author’s final draft

Versatile Data Acquisition and Controls for Epics Using Vme-Based Fpgas

Field-Programmable Gate Arrays (FPGAs) have provided Thomas Jefferson National Accelerator Facility (Jefferson Lab) with versatile VME-based data acquisition and control interfaces with minimal development times. FPGA designs have been used to interface to VME and provide control logic for numerous systems. The building blocks of these logic designs can be tailored to the individual needs of each system and provide system operators with read-backs and controls via a VME interface to an EPICS based computer. This versatility allows the system developer to choose components and define operating parameters and options that are not readily available commercially. Jefferson Lab has begun developing standard FPGA libraries that result in quick turn around times and inexpensive designs.Comment: 3 pages, ICALEPCS 2001, T. Allison and R. Foold, Jefferson La

The Next Linear Collider Test Accelerator

During the past several years, there has been tremendous progress on the development of the RF system and accelerating structures for a Next Linear Collider (NLC). Developments include high-power klystrons, RF pulse compression systems and damped/detuned accelerator structures to reduce wakefields. In order to integrate these separate development efforts into an actual X-band accelerator capable of accelerating the electron beams necessary for an NLC, we are building an NLC Test Accelerator (NLCTA). The goal of the NLCTA is to bring together all elements of the entire accelerating system by constructing and reliably operating an engineered model of a high-gradient linac suitable for the NLC. The NLCTA will serve as a testbed as the design of the NLC evolves. In addition to testing the RF acceleration system, the NLCTA is designed to address many questions related to the dynamics of the beam during acceleration. In this paper, we will report on the status of the design, component development, and construction of the NLC Test Accelerator