New approaches for the design of low-complexity radix-based FFT and FHT algorithms

The discrete Fourier transform (DFT) and discrete Hartley transform (DHT) play a crucial role in one- and multi-dimensional digital signal processing applications. Traditionally, the main concern in the design of fast Fourier transform (FFT) and fast Hartley transform (FHT) algorithms has been the reduction of the arithmetic complexity. However, with the recent advances in the digital technology and the present demands of such transforms in low-power high-performance real-time applications, a more comprehensive treatment of the computational and structural complexities must be considered in the design of the algorithms. The objective of this thesis is to design one- and multi-dimensional FFT and FHT algorithms that address the problem of reducing the number of arithmetic operations, data transfers, address generations, and twiddle factor evaluations or accesses to the lookup table, while possessing features such as simplicity, regularity, modularity, easy indexing scheme, and butterfly-style and in-place computations that are highly desirable characteristics for software or hardware implementations of the algorithms. To achieve these objectives, radix-based algorithms are proposed by introducing new decomposition strategies, efficient index mappings, and by an appropriate use of the Kronecker product. A general decomposition method, which is based on the radix-2 approach, valid for any dimension and applicable to both the DHT and DFT, and which significantly reduces the complexity of the FHT algorithms, is proposed. This method enables us to develop multidimensional FHT and FFT algorithms. A new approach for computing the DFT and DHT using a unified structure is proposed by establishing a close relationship, valid for any dimension, between the radix-2 based FHT and FFT algorithms. An efficient method, based on the radix-2 approach, for pruning output samples of a 1-D or 2-D DFT is proposed by grouping in its 1-D or 2-D FFT algorithm all the stages that involve unnecessary operations into a single stage and by introducing a new recursive technique for the computations required in the resulting stage. A technique is presented to improve the performance of the radix-4, radix-8 and radix-16 FFT algorithms in terms of the number of twiddle factor evaluations or accesses to the lookup table without any increase in the computational or structural complexities of the algorithms. In order to take advantage of the lowest structural complexity provided by the radix-2 approach and reduced computational complexity offered by the radix-4 approach, a technique suitable for combining these two approaches is introduced in order to develop efficient 3-D FFT and FHT algorithms. A radix-2/8 approach for reducing the complexity in the computation of the 1-D DFT and DHT of lengths N = q {604} 2 m is proposed by appropriately mixing the radix-2 and radix-8 index maps. This approach is extended to 2-D and 3-D DFTs. It is shown that the proposed radix-2/8 approach is superior to all the other existing radix-based approaches in providing low-complexity 1-D, 2-D and 3-D FFT, and 1-D FHT algorithms

New approaches for the design of low-complexity radix-based FFT and FHT algorithms

The discrete Fourier transform (DFT) and discrete Hartley transform (DHT) play a crucial role in one- and multi-dimensional digital signal processing applications. Traditionally, the main concern in the design of fast Fourier transform (FFT) and fast Hartley transform (FHT) algorithms has been the reduction of the arithmetic complexity. However, with the recent advances in the digital technology and the present demands of such transforms in low-power high-performance real-time applications, a more comprehensive treatment of the computational and structural complexities must be considered in the design of the algorithms. The objective of this thesis is to design one- and multi-dimensional FFT and FHT algorithms that address the problem of reducing the number of arithmetic operations, data transfers, address generations, and twiddle factor evaluations or accesses to the lookup table, while possessing features such as simplicity, regularity, modularity, easy indexing scheme, and butterfly-style and in-place computations that are highly desirable characteristics for software or hardware implementations of the algorithms. To achieve these objectives, radix-based algorithms are proposed by introducing new decomposition strategies, efficient index mappings, and by an appropriate use of the Kronecker product. A general decomposition method, which is based on the radix-2 approach, valid for any dimension and applicable to both the DHT and DFT, and which significantly reduces the complexity of the FHT algorithms, is proposed. This method enables us to develop multidimensional FHT and FFT algorithms. A new approach for computing the DFT and DHT using a unified structure is proposed by establishing a close relationship, valid for any dimension, between the radix-2 based FHT and FFT algorithms. An efficient method, based on the radix-2 approach, for pruning output samples of a 1-D or 2-D DFT is proposed by grouping in its 1-D or 2-D FFT algorithm all the stages that involve unnecessary operations into a single stage and by introducing a new recursive technique for the computations required in the resulting stage. A technique is presented to improve the performance of the radix-4, radix-8 and radix-16 FFT algorithms in terms of the number of twiddle factor evaluations or accesses to the lookup table without any increase in the computational or structural complexities of the algorithms. In order to take advantage of the lowest structural complexity provided by the radix-2 approach and reduced computational complexity offered by the radix-4 approach, a technique suitable for combining these two approaches is introduced in order to develop efficient 3-D FFT and FHT algorithms. A radix-2/8 approach for reducing the complexity in the computation of the 1-D DFT and DHT of lengths N = q {604} 2 m is proposed by appropriately mixing the radix-2 and radix-8 index maps. This approach is extended to 2-D and 3-D DFTs. It is shown that the proposed radix-2/8 approach is superior to all the other existing radix-based approaches in providing low-complexity 1-D, 2-D and 3-D FFT, and 1-D FHT algorithms

Low-power Programmable Processor for Fast Fourier Transform Based on Transport Triggered Architecture

This paper describes a low-power processor tailored for fast Fourier transform computations where transport triggering template is exploited. The processor is software-programmable while retaining an energy-efficiency comparable to existing fixed-function implementations. The power savings are achieved by compressing the computation kernel into one instruction word. The word is stored in an instruction loop buffer, which is more power-efficient than regular instruction memory storage. The processor supports all power-of-two FFT sizes from 64 to 16384 and given 1 mJ of energy, it can compute 20916 transforms of size 1024.Comment: 5 pages, 4 figures, 1 table, ICASSP 2019 conferenc

Efficient FPGA implementation of high-throughput mixed radix multipath delay commutator FFT processor for MIMO-OFDM

This article presents and evaluates pipelined architecture designs for an improved high-frequency Fast Fourier Transform (FFT) processor implemented on Field Programmable Gate Arrays (FPGA) for Multiple Input Multiple Output Orthogonal Frequency Division Multiplexing (MIMO-OFDM). The architecture presented is a Mixed-Radix Multipath Delay Commutator. The presented parallel architecture utilizes fewer hardware resources compared to Radix-2 architecture, while maintaining simple control and butterfly structures inherent to Radix-2 implementations. The high-frequency design presented allows enhancing system throughput without requiring additional parallel data paths common in other current approaches, the presented design can process two and four independent data streams in parallel and is suitable for scaling to any power of two FFT size N. FPGA implementation of the architecture demonstrated significant resource efficiency and high-throughput in comparison to relevant current approaches within literature. The proposed architecture designs were realized with Xilinx System Generator (XSG) and evaluated on both Virtex-5 and Virtex-7 FPGA devices. Post place and route results demonstrated maximum frequency values over 400 MHz and 470 MHz for Virtex-5 and Virtex-7 FPGA devices respectively

A class of AM-QFT algorithms for power-of-two FFT

This paper proposes a class of power-of-two FFT (Fast Fourier Transform) algorithms, called AM-QFT algorithms, that contains the improved QFT (Quick Fourier Transform), an algorithm recently published, as a special case. The main idea is to apply the Amplitude Modulation Double Sideband - Suppressed Carrier (AM DSB-SC) to convert odd-indices signals into even-indices signals, and to insert this elaboration into the improved QFT algorithm, substituting the multiplication by secant function. The 8 variants of this class are obtained by re-elaboration of the AM DSB-SC idea, and by means of duality. As a result the 8 variants have both the same computational cost and the same memory requirements than improved QFT. Differently, comparing this class of 8 variants of AM-QFT algorithm with the split-radix 3add/3mul (one of the most performing FFT approach appeared in the literature), we obtain the same number of additions and multiplications, but employing half of the trigonometric constants. This makes the proposed FFT algorithms interesting and useful for fixed-point implementations. Some of these variants show advantages versus the improved QFT. In fact one of this variant slightly enhances the numerical accuracy of improved QFT, while other four variants use trigonometric constants that are faster to compute in `on the fly' implementations

Non-power-of-Two FFTs: Exploring the Flexibility of the Montium TP

Coarse-grain reconfigurable architectures, like the Montium TP, have proven to be a very successful approach for low-power and high-performance computation of regular digital signal processing algorithms. This paper presents the implementation of a class of non-power-of-two FFTs to discover the limitations and Flexibility of the Montium TP for less regular algorithms. A non-power-of-two FFT is less regular compared to a traditional power-of-two FFT. The results of the implementation show the processing time, accuracy, energy consumption and Flexibility of the implementation

Radix-2 x 2 x 2 algorithm for the 3-D discrete hartley transform

The discrete Hartley transform (DHT) has proved to be a valuable tool in digital signal/image processing and communications and has also attracted research interests in many multidimensional applications. Although many fast algorithms have been developed for the calculation of one- and two-dimensional (1-D and 2-D) DHT, the development of multidimensional algorithms in three and more dimensions is still unexplored and has not been given similar attention; hence, the multidimensional Hartley transform is usually calculated through the row-column approach. However, proper multidimensional algorithms can be more efficient than the row-column method and need to be developed. Therefore, it is the aim of this paper to introduce the concept and derivation of the three-dimensional (3-D) radix-2 2X 2X algorithm for fast calculation of the 3-D discrete Hartley transform. The proposed algorithm is based on the principles of the divide-and-conquer approach applied directly in 3-D. It has a simple butterfly structure and has been found to offer significant savings in arithmetic operations compared with the row-column approach based on similar algorithms

A new Truncated Fourier Transform algorithm

Truncated Fourier Transforms (TFTs), first introduced by Van der Hoeven, refer to a family of algorithms that attempt to smooth "jumps" in complexity exhibited by FFT algorithms. We present an in-place TFT whose time complexity, measured in terms of ring operations, is comparable to existing not-in-place TFT methods. We also describe a transformation that maps between two families of TFT algorithms that use different sets of evaluation points.Comment: 8 pages, submitted to the 38th International Symposium on Symbolic and Algebraic Computation (ISSAC 2013