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Supported by the National Science Foundation. MIP 91-17724M. Silveira, A. Lumsdaine, J. White

Direct instruction wakeup for out-of-order processors

Instruction queues consume a significant amount of power in high-performance processors, primarily due to instruction wakeup logic access to the queue structures. The wakeup logic delay is also a critical timing parameter. This paper proposes a new queue organization using a small number of successor pointers plus a small number of dynamically allocated full successor bit vectors for cases with a larger number of successors. The details of the new organization are described and it is shown to achieve the performance of CAM-based or full dependency matrix organizations using just one pointer per instruction plus eight full bit vectors. Only two full bit vectors are needed when two successor pointers are stored per instruction. Finally, a design and pre-layout of all critical structures in 70 nm technology was performed for the proposed organization as well as for a CAM-based baseline. The new design is shown to use 1/2 to 1/5th of the baseline instruction queue power, depending on queue size. It is also shown to use significantly less power than the full dependency matrix based design.Peer ReviewedPostprint (published version

Gate oxide failure in MOS devices

The thesis presents an experimental and theoretical investigation of gate oxide breakdown in MOS networks, with a particular emphasis on constant voltage overstress failure. It begins with a literature search on gate oxide failure mechanisms, particularly time-dependent dielectric breakdown, in MOS devices. The experimental procedure is then reported for the study of gate oxide breakdown under constant voltage stress. The experiments were carried out on MOSFETs and MOS capacitor structures, recording the characteristics of the devices before and after the stress. The effects of gate oxide breakdown in one of the transistors in an nMOS inverter were investigated and several parameters were found to have changed. A mathematical model for oxide breakdown, based on physical mechanisms, is proposed. Both electron and hole trapping occurred during the constant voltage stress. Breakdown appears to take place when the trapped hole density reach a critical value. PSPICE simulations were performed for the MOSFETs, nMOS inverter and CMOS logic circuits. Two models of MOSFET with gate oxide short were validated. A good agreement between experiments and simulations was achieved

Environmentally-induced discharge transient coupling to spacecraft

The Hughes SCREENS (Space Craft Response to Environments of Space) technique was applied to generic spin and 3-axis stabilized spacecraft models. It involved the NASCAP modeling for surface charging and lumped element modeling for transients coupling into a spacecraft. A differential voltage between antenna and spun shelf of approx. 400 V and current of 12 A resulted from discharge at antenna for the spinner and approx. 3 kv and 0.3 A from a discharge at solar panels for the 3-axis stabilized Spacecraft. A typical interface circuit response was analyzed to show that the transients would couple into the Spacecraft System through ground points, which are most vulnerable. A compilation and review was performed on 15 years of available data from electron and ion current collection phenomena. Empirical models were developed to match data and compared with flight data of Pix-1 and Pix-2 mission. It was found that large space power systems would float negative and discharge if operated at or above 300 V. Several recommendations are given to improve the models and to apply them to large space systems

DESIGN OF LOW POWER MOBILE TRANSMITTER

The objective of this project is to design a power amplifier for a new two way mobile radio product being launched by Motorola. Two-way mobile radio consists of a transmitter, receiver and a voltage-controlled oscillator. Mobile radios usually have transmitter whose power output ranges from 1 W to 50 W. Design of transmitter lineup for mobile radio involves the design of appropriate matching network for driver and power amplifier. The power and voltage control of these devices are equally important. Designing a mobile radio transmitter is regarded tricky due to difficulty in getting a robust transmitter that is stable with minimum oscillation. In this work, the design is attempted usmg Advanced Design Simulator (ADS). The design simulation provides accurate simulation on harmonic filter and antenna switch. 50 ohm matching networks have also been designed and simulated using ADS and it gives close approximation to the specifications. The radio has since been prototyped and tested. The evaluation and testing of the radio has been carried out and it satisfies the specifications that are set by the Telecommunication Industry Association (TIA). Some minor optimization has also been performed to improve the radio performance. Eventual product is a transmitter line up that function well today. 11