91 research outputs found
Improving WalkSAT for Random 3-SAT Problems
Stochastic local search (SLS) algorithms are well known for their ability to efficiently find models of random instances of the Boolean satisfiability (SAT) problems. One of the most famous SLS algorithms for SAT is called WalkSAT, which has wide influence and performs well on most of random 3-SAT instances. However, the performance of WalkSAT lags far behind on random 3-SAT instances equal to or greater than the phase transition ratio. Motivated by this limitation, in the present work, firstly an allocation strategy is introduced and utilized in WalkSAT to determine the initial assignment, leading to a new algorithm called WalkSATvav. The experimental results show that WalkSATvav significantly outperforms the state-of-the-art SLS solvers on random 3-SAT instances at the phase transition for SAT Competition 2017. However, WalkSATvav cannot rival its competitors on random 3-SAT instances greater than the phase transition ratio. Accordingly, WalkSATvav is further improved for such instances by utilizing a combination of an improved genetic algorithm and an improved ant colony algorithm, which complement each other in guiding the search direction. The resulting algorithm, called WalkSATga, is far better than WalkSAT and significantly outperforms some previous known SLS solvers on random 3-SAT instances greater than the phase transition ratio from SAT Competition 2017. Finally, a new SAT solver called WalkSATlg, which combines WalkSATvav and WalkSATga, is proposed, which is competitive with the winner of random satisfiable category of SAT competition 2017 on random 3-SAT problem
A Parallel Hardware Architecture For Quantum Annealing Algorithm Acceleration
Quantum Annealing (QA) is an emerging technique, derived from Simulated Annealing, providing metaheuristics for multivariable optimisation problems. Studies have shown that it can be applied to solve NP-hard problems with faster convergence and better quality of result than other traditional heuristics, with potential applications in a variety of fields, from transport logistics to circuit synthesis and optimisation. In this paper, we present a hardware architecture implementing a QA-based solver for the Multidimensional Knapsack Problem, designed to improve the performance of the algorithm by exploiting parallelised computation. We synthesised the architecture using as a target an Altera FPGA board and simulated the execution for solving a set of benchmarks available in the literature. Simulation results show that the proposed implementation is about 100 times faster than a single-thread general-purpose CPU without impact on the accuracy of the solution
The GPU on the simulation of cellular computing models
Membrane Computing is a discipline aiming to
abstract formal computing models, called membrane systems
or P systems, from the structure and functioning of the living
cells as well as from the cooperation of cells in tissues,
organs, and other higher order structures. This framework
provides polynomial time solutions to NP-complete problems
by trading space for time, and whose efficient simulation
poses challenges in three different aspects: an intrinsic
massively parallelism of P systems, an exponential computational
workspace, and a non-intensive floating point nature.
In this paper, we analyze the simulation of a family of recognizer
P systems with active membranes that solves the
Satisfiability problem in linear time on different instances of
Graphics Processing Units (GPUs). For an efficient handling
of the exponential workspace created by the P systems
computation, we enable different data policies to increase
memory bandwidth and exploit data locality through tiling
and dynamic queues. Parallelism inherent to the target P
system is also managed to demonstrate that GPUs offer a
valid alternative for high-performance computing at a considerably
lower cost. Furthermore, scalability is demonstrated
on the way to the largest problem size we were able to
run, and considering the new hardware generation from
Nvidia, Fermi, for a total speed-up exceeding four orders of
magnitude when running our simulations on the Tesla S2050
server.Agencia Regional de Ciencia y Tecnología - Murcia 00001/CS/2007Ministerio de Ciencia e Innovación TIN2009–13192Ministerio de Ciencia e Innovación TIN2009-14475-C04European Commission Consolider Ingenio-2010 CSD2006-0004
Hybrid Ant Colony Optimization For Two Satisfiability Programming In Hopfield Neural Network
The representation of 2 Satisfiability problem or 2SAT is increasingly viewed as a significant logical rule in order to synthesize many real life applications. Although there were many researchers proposed the solution of 2SAT, little attention has been paid to the significance of the 2SAT logical rule itself. It can be hypothesized that 2SAT property can be used as a logical rule in the intelligent system. To verify this claim, 2 Satisfiability logic programming was embedded to Hopfield neural network (HNN) as a single unit. Learning in HNN will be inspired by Wan Abdullah method since the conventional Hebbian learning is inefficient when dealing with large number of constraints. As the number of 2SAT clauses increased, the efficiency and effectiveness of the learning phase in HNN deteriorates. Swarm intelligence metaheuristic algorithm has been introduced to reduce the learning complexity of the network. The newly proposed metaheuristic algorithm was enhanced ant colony optimization (ACO) algorithm
GPU parallelization strategies for metaheuristics: a survey
Metaheuristics have been showing interesting results in solving hard optimization problems. However, they become limited in terms of effectiveness and runtime for high dimensional problems. Thanks to the independency of metaheuristics components, parallel computing appears as an attractive choice to reduce the execution time and to improve solution quality. By exploiting the increasing performance and programability of graphics processing units (GPUs) to this aim, GPU-based parallel metaheuristics have been implemented using different designs. RecentresultsinthisareashowthatGPUstendtobeeffectiveco-processors forleveraging complex optimization problems.In thissurvey, mechanisms involvedinGPUprogrammingforimplementingparallelmetaheuristicsare presentedanddiscussedthroughastudyofrelevantresearchpapers.
Metaheuristics can obtain satisfying results when solving optimization problems in a reasonable time. However, they suffer from the lack of scalability. Metaheuristics become limited ahead complex highdimensional optimization problems. To overcome this limitation, GPU based parallel computing appears as a strong alternative. Thanks to GPUs, parallelmetaheuristicsachievedbetterresultsintermsofcomputation,and evensolutionquality
Refactoring GrPPI:Generic Refactoring for Generic Parallelism in C++
Funding: EU Horizon 2020 project, TeamPlay (https://www.teamplay-xh2020.eu), Grant Number 779882, UK EPSRC Discovery, grant number EP/P020631/1, and Madrid Regional Government, CABAHLA-CM (ConvergenciA Big dAta-Hpc: de Los sensores a las Aplicaciones) Grant Number S2018/TCS-4423.The Generic Reusable Parallel Pattern Interface (GrPPI) is a very useful abstraction over different parallel pattern libraries, allowing the programmer to write generic patterned parallel code that can easily be compiled to different backends such as FastFlow, OpenMP, Intel TBB and C++ threads. However, rewriting legacy code to use GrPPI still involves code transformations that can be highly non-trivial, especially for programmers who are not experts in parallelism. This paper describes software refactorings to semi-automatically introduce instances of GrPPI patterns into sequential C++ code, as well as safety checking static analysis mechanisms which verify that introducing patterns into the code does not introduce concurrency-related bugs such as race conditions. We demonstrate the refactorings and safety-checking mechanisms on four simple benchmark applications, showing that we are able to obtain, with little effort, GrPPI-based parallel versions that accomplish good speedups (comparable to those of manually-produced parallel versions) using different pattern backends.Publisher PDFPeer reviewe
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