8 research outputs found

    Adaptive self-calibrating image rejection receiver

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    An adaptive self-calibrating image rejection receiver is described, containing a modified Weaver image rejection mixer and a Digital Image Rejection Processor (DIRP). The blind source-separation-based DIRP eliminates the I/Q errors improving the Image Rejection Ratio (IRR) without the need for trimming or use of power-hungry discrete components. Hardware complexity is minimal, requiring only two complex coefficients; hence it can be easily integrated into the signal processing path of any receiver. Simulation results show that the proposed approach achieves 75-97 dB of IRR

    Design and low-power implementation of an adaptive image rejection receiver

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    This paper deals with and details the design and implementation of a low-power; hardware-efficient adaptive self-calibrating image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Hybrid strength-reduced and re-scheduled data-flow, low-power implementation of the adaptive self-calibration algorithm is developed and its efficiency is demonstrated through simulation case studies. A behavioral and structural model is developed in Matlab as well as a low-level architectural design in VHDL providing valuable test benches for the performance measures undertaken on the detailed algorithms and structures

    Living and dealing with RF impairments in communication transceivers

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    This paper provides an overview of the sources and effects of the RF impairments limiting and rendering the performance of the future wireless communication transceivers costly as well as hindering their wide-spread use in commercial products. As transmission bandwidths and carrier frequencies increase effect of these impairments worsen. This paper studies and presents analytical evaluations of the performance degradation due to the RF impairments in terms of bit-error-rate and image rejection ratio. The paper also give highlights of the various aspects of the research carried out in mitigating the effects of these impairments primarily in the digital signal processing domain at the baseband as well as providing low-complexity hardware implementations of such algorithms incorporating a number of power and area saving techniques

    A low complexity DSP driven analog impairment mitigation scheme for low-IF GNSS receivers

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    Due to the increasing demands for location based services within the wireless mass-market; there has been relentless pressure to reduce both the chip area and power dissipation of the user terminal. Low-IF receivers combine the advantages of superheterodyne and direct-conversion architectures offering a highly integrated solution while avoiding the issues associated with DC offsets and flicker noise. The main drawback of the low-IF architecture is its limited image rejection due to analog impairments. In this paper, the sources of the impairments are analyzed for a low-IF receiver operating at the GPS/Galileo L1 band together with a novel low-complexity solution to compensate for them in the DSP domain is proposed. For processing the combined GPS/Galileo L1 signal, a signal simulator we call GNSScope has been developed together with a low-IF receiver model to analyze the influence of the analog impairments. The idea behind our proposed novel adaptive compensator which estimates and compensates for the imbalances and mismatches is that in the absence of these mismatches no correlation exists between the desired and the image channels, which is not the case when impairments are present. Results show that through the deployment of the proposed approach, image-rejection performance can be enhanced by 75 dB. This enhancement in the image-rejection performance subsequently results in relaxed analog front-end specifications leading to high levels of integration making it possible for highly integrated software-defined Global Navigation Satellite Systems (GNSS) receiver to be realistically and economically designed and implemented

    A 802.11g and UMTS Simultaneous Reception Front-End Architecture using a double IQ structure

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    International audienceIn this paper, we address the architecture of multistandard simultaneous reception receivers and we aim to reduce the complexity of the analog front-end. To this end, we propose an architecture using the double orthogonal translation technique in order to multiplex two signals received on different frequency bands. A study case concerning the simultaneous reception of 802.11g and UMTS signals is developed in this paper. Theoretical and simulation results show that this type of multiplexing does not significantly influence the evolution of the signal to noise ratio of the signals

    Low complexity blind and data-aided IQ imbalance compensation methods for low-IF receivers

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    Low-IF and Zero-IF (direct conversion) down converters showed a great potential in implementing multi standard single chip solutions, eliminating the need to use off chip components and so reduce the area and the cost of the wireless receivers. One of the main performance limitations in the low-IF & Zero-IF down-converters is the components mismatch between the in-phase path and the quadrature-path named the IQ Imbalance (IQI) which limits the achievable image rejection ratio (IRR) of the down converters. Many techniques had been proposed to enhance the achievable IRR either by using calibration methods, e.g. using lab calibration, or by doing online compensation during signal reception. In this work those techniques are reviewed, proposing three new methods for blind IQI compensation techniques, the first proposed method targets the low input signal to interference ratio (low SIRin) while the second and third methods targets the moderate and high SIRin, showing that the proposed methods reach better performance and/or lower complexity than the methods already introduced in the literature. Also two techniques to perform data aided IQI compensation are introduced exploiting pilot symbols within the desired signal with no prior knowledge about the image signal. The first method exploits a preamble sequence assuming slow fading condition while the second approach exploits a sequence of pilots to compensate for the IQI being suitable for fast fading conditions as well. Simulation results showed that the proposed data aided techniques achieved shorter convergence time and higher image rejection ratio compared to the blind methods at high SNR values

    低IF受信機におけるイメージ信号抑圧方式に関する研究

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    近年,無線通信システムにおいては,通信速度の高速化が図られている.第1及び第2世代移動通信システムでは音声通信が中心であったが,第3世代では数Mbpsまで高速化した.現在では第3世代と第4世代が混在しており最大100Mbps程度の高速化が実現している.第5世代移動通信システムが実用化すると想定される2020年頃には第3世代,第4世代,第5世代などの各システムが混在していると予想される.低IF方式受信機は,低IFで増幅度をある程度必要とするようなやや低速のデータ伝送の用途に対応するための狭帯域システムに適している.自営無線システムなどでは,今後も狭帯域システムが使用される場合があるため,低IF方式受信機の使用される用途が存在すると考えられる.zero-IFと低IF方式はハードウエア構成が同じであるため,ソフトウエア無線やコグニティブ無線のようにマルチバンドやマルチシステム対応で適用システムを切り替えるときに,ソフトウエアでzero-IFと低IF方式のどちらかの方式を切り替えることが必要な用途に適している.上記各システムが混在している場合において,周波数帯あるいは広帯域(高速データ伝送)/狭帯域(低速データ伝送)をソフトウエアで切り替えることが容易に可能である.本論文は,低IF方式の受信機において必須の課題であるイメージ信号の抑圧比を向上させるために,位相偏差補償処理及び振幅偏差補償処理をディジタル信号処理により実現する厚生及び処理方式の実現について述べている.位相偏差補償処理及び振幅偏差補償処理については受信機に入力した信号によりブラインド的に位相偏差と振幅偏差を検出して補償する方式と,パイロット信号を位相偏差と振幅偏差を生じるアナログデバイスに入力して,位相偏差と振幅偏差を検出して補償を行う方式に分けられる.補償する方法はフィードバック方式及びフィードフォワード方式,位相偏差と振幅偏差を直接検出して補償する方法と逆行列演算で補償する方法,収束アルゴリズムによる方法等がある.本論文では,収束アルゴリズム等は使用せず演算処理を少なくする方法としてブラインド的に1次の制御ループでフィードバック形式による補償方式,パイロット方式で逆行列でフィードフォワード形式により補償する方法を提案し,その解析及び性能評価を行う.第2章では,従来のイメージ信号抑圧方式を解析して,低IF受信機における位相・振幅偏差のイメージ信号抑圧特性への影響を示し,従来方式の問題点を明らかにする.さらに,提案方式の受信機の構成を検討して示す.第3章では,上記ブラインド的にフィードバック形式により1次の制御ループで補償する方法について,実用的な処理で位相・振幅偏差を検出して補償が出来る事の理論的根拠を示し,提案方式の構成において有効性を評価するために計算機シミュレーション及び実験によりイメージ信号抑圧比(IRR:Image Rejection Ratio)が向上することを確認して,その特性の評価解析を行う.さらに提案方法を実用的なFPGA(Field-Programmable Gate Array)等の処理に対応するために,固定小数点演算の影響があっても実用的な入力信号範囲(入力信号の振幅の現象又は量子化ビット数の減少)で所要の60dBのIRRが可能であることナラビニ処理負荷を軽減するための近似処理による誤差(劣化)を評価解析する.また,収束時間(時定数)・入力信号の帯域幅と精度(分散)の関係及び2信号特性(希望波とイメージ波)についてもシミュレーション及び実験結果について考察して解析を行う.第4章では,上記パイロット信号を使用してフィードフォワード形式で逆行列演算による補償方式について提案を行い,理論的根拠を示し,提案方式の方法において有効性を評価するために第3章の制御ループによる方法と同様に計算機シミュレーションによりイメージ周波数信号抑圧比が向上することを検証して提案手法の評価解析を行う.パイロット方式では,温度変化等により位相及び振幅偏差が変化した場合においても補償が可能となるように受信信号とパイロット信号を合成して補償する方法の提案方式においてデータを平均する必要があるがその平均するデータ数・受信信号(妨害波)の帯域とIRRとの関係をシミュレーションで確認して解析を行う.第5章では,第3章及び第4章における提案方式であるブラインド方式及びパイロット方式についての比較を行い,通信システムに対する適用性を評価解析する.第6章は結論であり,第2章から第4章までの成果を要約する.電気通信大学201

    Broadband Direct RF Digitization Receivers

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