303 research outputs found

    Construction of Near-Optimum Burst Erasure Correcting Low-Density Parity-Check Codes

    Full text link
    In this paper, a simple, general-purpose and effective tool for the design of low-density parity-check (LDPC) codes for iterative correction of bursts of erasures is presented. The design method consists in starting from the parity-check matrix of an LDPC code and developing an optimized parity-check matrix, with the same performance on the memory-less erasure channel, and suitable also for the iterative correction of single bursts of erasures. The parity-check matrix optimization is performed by an algorithm called pivot searching and swapping (PSS) algorithm, which executes permutations of carefully chosen columns of the parity-check matrix, after a local analysis of particular variable nodes called stopping set pivots. This algorithm can be in principle applied to any LDPC code. If the input parity-check matrix is designed for achieving good performance on the memory-less erasure channel, then the code obtained after the application of the PSS algorithm provides good joint correction of independent erasures and single erasure bursts. Numerical results are provided in order to show the effectiveness of the PSS algorithm when applied to different categories of LDPC codes.Comment: 15 pages, 4 figures. IEEE Trans. on Communications, accepted (submitted in Feb. 2007

    RS + LDPC-Staircase Codes for the Erasure Channel: Standards, Usage and Performance

    Get PDF
    Application-Level Forward Erasure Correction (AL-FEC) codes are a key element of telecommunication systems. They are used to recover from packet losses when retransmission are not feasible and to optimize the large scale distribution of contents. In this paper we introduce Reed-Solomon/LDPCStaircase codes, two complementary AL-FEC codes that have recently been recognized as superior to Raptor codes in the context of the 3GPP-eMBMS call for technology [1]. After a brief introduction to the codes, we explain how to design high performance codecs which is a key aspect when targeting embedded systems with limited CPU/battery capacity. Finally we present the performances of these codes in terms of erasure correction capabilities and encoding/decoding speed, taking advantage of the 3GPP-eMBMS results where they have been ranked first

    A Decoding Algorithm for LDPC Codes Over Erasure Channels with Sporadic Errors

    Get PDF
    none4An efficient decoding algorithm for low-density parity-check (LDPC) codes on erasure channels with sporadic errors (i.e., binary error-and-erasure channels with error probability much smaller than the erasure probability) is proposed and its performance analyzed. A general single-error multiple-erasure (SEME) decoding algorithm is first described, which may be in principle used with any binary linear block code. The algorithm is optimum whenever the non-erased part of the received word is affected by at most one error, and is capable of performing error detection of multiple errors. An upper bound on the average block error probability under SEME decoding is derived for the linear random code ensemble. The bound is tight and easy to implement. The algorithm is then adapted to LDPC codes, resulting in a simple modification to a previously proposed efficient maximum likelihood LDPC erasure decoder which exploits the parity-check matrix sparseness. Numerical results reveal that LDPC codes under efficient SEME decoding can closely approach the average performance of random codes.noneG. Liva; E. Paolini; B. Matuz; M. ChianiG. Liva; E. Paolini; B. Matuz; M. Chian

    An Iteratively Decodable Tensor Product Code with Application to Data Storage

    Full text link
    The error pattern correcting code (EPCC) can be constructed to provide a syndrome decoding table targeting the dominant error events of an inter-symbol interference channel at the output of the Viterbi detector. For the size of the syndrome table to be manageable and the list of possible error events to be reasonable in size, the codeword length of EPCC needs to be short enough. However, the rate of such a short length code will be too low for hard drive applications. To accommodate the required large redundancy, it is possible to record only a highly compressed function of the parity bits of EPCC's tensor product with a symbol correcting code. In this paper, we show that the proposed tensor error-pattern correcting code (T-EPCC) is linear time encodable and also devise a low-complexity soft iterative decoding algorithm for EPCC's tensor product with q-ary LDPC (T-EPCC-qLDPC). Simulation results show that T-EPCC-qLDPC achieves almost similar performance to single-level qLDPC with a 1/2 KB sector at 50% reduction in decoding complexity. Moreover, 1 KB T-EPCC-qLDPC surpasses the performance of 1/2 KB single-level qLDPC at the same decoder complexity.Comment: Hakim Alhussien, Jaekyun Moon, "An Iteratively Decodable Tensor Product Code with Application to Data Storage

    Non-Coherent Cooperative Communications Dispensing with Channel Estimation Relying on Erasure Insertion Aided Reed-Solomon Coded SFH M-ary FSK Subjected to Partial-Band Interference and Rayleigh Fading

    No full text
    The rationale of our design is that although much of the literature of cooperative systems assumes perfect coherent detection, the assumption of having any channel estimates at the relays imposes an unreasonable burden on the relay station. Hence, non-coherently detected Reed-Solomon (ReS) coded Slow Frequency Hopping (SFH) assisted M -ary Frequency Shift Keying (FSK) is proposed for cooperative wireless networks, subjected to both partial-band interference and Rayleigh fading. Erasure insertion (EI) assisted ReS decoding based on the joint maximum output-ratio threshold test (MO-RTT) is investigated in order to evaluate the attainable system performance. Compared to the conventional error-correction-only decoder, the EI scheme may achieve an Eb/N0 gain of approximately 3dB at the Codeword Error Probability, Pw , of 10-4 , when employing the ReS (31, 20) code combined with 32-FSK modulation. Additionally, we evaluated the system’s performance, when either equal gain combining (EGC) or selection combining (SC) techniques are employed at the destination’s receiver. The results demonstrated that in the presence of one and two assisting relays, the EGC scheme achieves gains of 1.5 dB and 1.0 dB at the Pw of 10-6 , respectively, compared to the SC arrangement. Furthermore, we demonstrated that for the same coding rate and packet size, the ReS (31, 20) code using EI decoding is capable of outperforming convolutional coding, when 32-FSK modulation is considered, whilst LDPC coding had an edge over the above two schemes

    Irregular polar coding for complexity-constrained lightwave systems

    Get PDF
    Next-generation fiber-optic communications call for ultra-reliable forward error correction codes that are capable of low-power and low-latency decoding. In this paper, we propose a new class of polar codes, whose polarization units are irregularly pruned to reduce computational complexity and decoding latency without sacrificing error correction performance. We then experimentally demonstrate that the proposed irregular polar codes can outperform state-of-the-art low-density parity-check (LDPC) codes, while decoding complexity and latency can be reduced by at least 30% and 70%, respectively, versus regular polar codes, while also obtaining a marginal performance improvement
    corecore