A Logic for Non-Deterministic Parallel Abstract State Machines

We develop a logic which enables reasoning about single steps of non-deterministic parallel Abstract State Machines (ASMs). Our logic builds upon the unifying logic introduced by Nanchen and St\"ark for reasoning about hierarchical (parallel) ASMs. Our main contribution to this regard is the handling of non-determinism (both bounded and unbounded) within the logical formalism. Moreover, we do this without sacrificing the completeness of the logic for statements about single steps of non-deterministic parallel ASMs, such as invariants of rules, consistency conditions for rules, or step-by-step equivalence of rules.Comment: arXiv admin note: substantial text overlap with arXiv:1602.0748

Regular Expression Matching and Operational Semantics

Many programming languages and tools, ranging from grep to the Java String library, contain regular expression matchers. Rather than first translating a regular expression into a deterministic finite automaton, such implementations typically match the regular expression on the fly. Thus they can be seen as virtual machines interpreting the regular expression much as if it were a program with some non-deterministic constructs such as the Kleene star. We formalize this implementation technique for regular expression matching using operational semantics. Specifically, we derive a series of abstract machines, moving from the abstract definition of matching to increasingly realistic machines. First a continuation is added to the operational semantics to describe what remains to be matched after the current expression. Next, we represent the expression as a data structure using pointers, which enables redundant searches to be eliminated via testing for pointer equality. From there, we arrive both at Thompson's lockstep construction and a machine that performs some operations in parallel, suitable for implementation on a large number of cores, such as a GPU. We formalize the parallel machine using process algebra and report some preliminary experiments with an implementation on a graphics processor using CUDA.Comment: In Proceedings SOS 2011, arXiv:1108.279

Optimisation of a parallel ocean general circulation model

Abstract. This paper presents the development of a general-purpose parallel ocean circulation model, for use on a wide range of computer platforms, from traditional scalar machines to workstation clusters and massively parallel processors. Parallelism is provided, as a modular option, via high-level message-passing rou- tines, thus hiding the technical intricacies from the user. An initial implementation highlights that the parallel e?ciency of the model is adversely a?ected by a number of factors, for which optimisations are discussed and implemented. The resulting ocean code is portable and, in particular, allows science to be achieved on local workstations that could otherwise only be undertaken on state-of-the-art supercomputers

State machines for large scale computer software and systems

A method for specifying the behavior and architecture of discrete state systems such as digital electronic devices and software using deterministic state machines and automata products. The state machines are represented by sequence maps $f:A^*\to X$ where $f(s)=x$ indicates that the output of the system is $x$ in the state reached by following the sequence of events $s$ from the initial state. Examples provided include counters, networks, reliable message delivery, real-time analysis of gates and latches, and producer/consumer. Techniques for defining, parameterizing, characterizing abstract properties, and connecting sequence functions are developed. Sequence functions are shown to represent (possibly non-finite) Moore type state machines and general products of state machines. The method draws on state machine theory, automata products, and recursive functions and is ordinary working mathematics, not involving formal methods or any foundational or meta-mathematical techniques. Systems in which there are levels of components that may operate in parallel or concurrently are specified in terms of function composition

On the combination of argumentation solvers into parallel portfolios

In the light of the increasing interest in efficient algorithms for solving abstract argumentation problems and the pervasive availability of multicore machines, a natural research issue is to combine existing argumentation solvers into parallel portfolios. In this work, we introduce six methodologies for the automatic configuration of parallel portfolios of argumentation solvers for enumerating the preferred extensions of a given framework. In particular, four methodologies aim at combining solvers in static portfolios, while two methodologies are designed for the dynamic configuration of parallel portfolios. Our empirical results demonstrate that the configuration of parallel portfolios is a fruitful way for exploiting multicore machines, and that the presented approaches outperform the state of the art of parallel argumentation solvers

On Static Timing Analysis of GPU Kernels

We study static timing analysis of programs running on GPU accelerators. Such programs follow a data parallel programming model that allows massive parallelism on manycore processors. Data parallel programming and GPUs as accelerators have received wide use during the recent years. The timing analysis of programs running on single core machines is well known and applied also in practice. However for multicore and manycore machines, timing analysis presents a significant but yet not properly solved problem. In this paper, we present static timing analysis of GPU kernels based on a method that we call abstract CTA simulation. Cooperative Thread Arrays (CTA) are the basic execution structure that GPU devices use in their operation that proceeds in thread groups called warps. Abstract CTA simulation is based on static analysis of thread divergence in warps and their abstract scheduling

A semantic basis for parallel algorithm design

As computing demands increase, emphasis is being placed on parallel architectures- To efficiently use parallel machines, software must be designed to take advantage of these machines. This research concentrates on an abstraction of algorithm design to permit the expression of parallel programs. The abstraction emphasizes thought about algorithms at a high level as opposed to algorithm implementation at a statement level. A model based on data flow allows algorithm expression using flow diagrams. The model specifies operating system requirements that support parallel programming at a module level. Paths are used to carry data between modules. Data enter modules through ports. Module activation is triggered by the satisfaction of data availability conditions. Continual module presence within the system, dynamic activation criteria, and a high level of programming distinguishes this model from other parallel programming systems --Abstract, page ii