2,733 research outputs found

    FIFO anomaly is unbounded

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    Virtual memory of computers is usually implemented by demand paging. For some page replacement algorithms the number of page faults may increase as the number of page frames increases. Belady, Nelson and Shedler constructed reference strings for which page replacement algorithm FIFO produces near twice more page faults in a larger memory than in a smaller one. They formulated the conjecture that 2 is a general bound. We prove that this ratio can be arbitrarily large

    Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration

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    Numerous researchers have studied the contention that arises among tasks running in parallel on a multicore processor. Most of those studies seek to derive a tight and sound upper-bound for the worst-case delay with which a processor resource may serve an incoming request, when its access is arbitrated using time-predictable policies such as round-robin or FIFO. We call this value upper-bound delay ( ubd ). Deriving trustworthy ubd statically is possible when sufficient public information exists on the timing latency incurred on access to the resource of interest. Unfortunately however, that is rarely granted for commercial-of-the-shelf (COTS) processors. Therefore, the users resort to measurement observations on the target processor and thus compute a “measured” ubdm . However, using ubdm to compute worst-case execution time values for programs running on COTS multicore processors requires qualification on the soundness of the result. In this paper, we present a measurement-based methodology to derive a ubdm under round-robin (RoRo) and first-in-first-out (FIFO) arbitration, which accurately approximates ubd from above, without needing latency information from the hardware provider. Experimental results, obtained on multiple processor configurations, demonstrate the robustness of the proposed methodology.The research leading to this work has received funding from: the European Union’s Horizon 2020 research and innovation programme under grant agreement No 644080(SAFURE); the European Space Agency under Contract 789.2013 and NPI Contract 40001102880; and COST Action IC1202, Timing Analysis On Code-Level (TACLe). This work has also been partially supported by the Spanish Ministry of Science and Innovation under grant TIN2015-65316-P. Jaume Abella has been partially supported by the MINECO under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717. The authors would like to thanks Paul Caheny for his help with the proofreading of this document.Peer ReviewedPostprint (author's final draft

    Advanced Design Concepts for Open Distributed Systems Development

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    Experience with the engineering of large scale open distributed systems has shown that their design should be specified at several well-defined levels of abstraction, in which each level aims at satisfying specific user, architectural, and implementation needs. Therefore, designers should dispose of a comprehensive design methodology, which allows them to conceive a specification at a certain abstraction level and transform this specification into a conforming specification at a lower abstraction level. The collection of these transformations should abridge the total design trajectory from initial user requirements to final implementation. The authors present and discuss some advanced design concepts that provide a basis for such a design methodolog

    A unified approach to the performance analysis of caching systems

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    We propose a unified methodology to analyse the performance of caches (both isolated and interconnected), by extending and generalizing a decoupling technique originally known as Che's approximation, which provides very accurate results at low computational cost. We consider several caching policies, taking into account the effects of temporal locality. In the case of interconnected caches, our approach allows us to do better than the Poisson approximation commonly adopted in prior work. Our results, validated against simulations and trace-driven experiments, provide interesting insights into the performance of caching systems.Comment: in ACM TOMPECS 20016. Preliminary version published at IEEE Infocom 201

    Exact Analysis of TTL Cache Networks: The Case of Caching Policies driven by Stopping Times

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    TTL caching models have recently regained significant research interest, largely due to their ability to fit popular caching policies such as LRU. This paper advances the state-of-the-art analysis of TTL-based cache networks by developing two exact methods with orthogonal generality and computational complexity. The first method generalizes existing results for line networks under renewal requests to the broad class of caching policies whereby evictions are driven by stopping times. The obtained results are further generalized, using the second method, to feedforward networks with Markov arrival processes (MAP) requests. MAPs are particularly suitable for non-line networks because they are closed not only under superposition and splitting, as known, but also under input-output caching operations as proven herein for phase-type TTL distributions. The crucial benefit of the two closure properties is that they jointly enable the first exact analysis of feedforward networks of TTL caches in great generality

    Scope-Based Method Cache Analysis

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    The quest for time-predictable systems has led to the exploration of new hardware architectures that simplify analysis and reasoning in the temporal domain, while still providing competitive performance. For the instruction memory, the method cache is a conceptually attractive solution, as it requests memory transfers at well-defined instructions only. In this article, we present a new cache analysis framework that generalizes and improves work on cache persistence analysis. The analysis demonstrates that a global view on the cache behavior permits the precise analyses of caches which are hard to analyze by inspecting cache state locally

    Changes in the Balance Sheet of the U.S. Manufacturing Sector, 1926-1977

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    This is a report on the results of a research project, sponsored by the NBER's Program on Financial Markets and Monetary Economics, which involves the collection and organization of income account and balance sheet data, at the firm level, for the years 1926-77. The primary data source for the study is Moody's Industrial Manual. Working at the firm level, it is possible to obtain accurate information on the market values of traded securities.This paper presents and discusses some of the aggregate characteristics of the dataset and also reports the results of estimating a simple portfolio model which attempts to explain changes in firm balance sheet flows for the periods 1927-35 and 1965-77.The data collected for the study, as well as software necessary to manage them efficiently, are available from the authors. An NBER Technical Paper will shortly be available to describe the dataset and software in detail.
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