A High TCMRR, Inherently Charge Balanced Bidirectional Front-End for Multichannel Closed-Loop Neuromodulation

This paper describes a multichannel bidirectional front-end for implantable closed-loop neuromodulation. Stimulation artefacts are reduced by way of a 4-channel H-bridge current source sharing stimulator front-end that minimizes residual charge drops in the electrodes via topology-inherent charge balancing. A 4-channel chopper front-end is capable of multichannel recording in the presence of artefacts as a result of its high total common-mode rejection ratio (TCMRR) that accounts for CMRR degradation due to electrode mismatch. Experimental verification of a prototype fabricated in a standard 180 nm process shows a stimulator front-end with 0.059% charge balance and 0.275 nA DC current error. The recording front-end consumes 3.24 µW, tolerates common-mode interference up to 1 Vpp and shows a TCMRR > 66 dB for 500 mVpp inputs.Ministerio de Economía y Competitividad TEC2016-80923-POffice of Naval Research (USA) N00014111031

Advances in Microelectronics for Implantable Medical Devices

Implantable medical devices provide therapy to treat numerous health conditions as well as monitoring and diagnosis. Over the years, the development of these devices has seen remarkable progress thanks to tremendous advances in microelectronics, electrode technology, packaging and signal processing techniques. Many of today’s implantable devices use wireless technology to supply power and provide communication. There are many challenges when creating an implantable device. Issues such as reliable and fast bidirectional data communication, efficient power delivery to the implantable circuits, low noise and low power for the recording part of the system, and delivery of safe stimulation to avoid tissue and electrode damage are some of the challenges faced by the microelectronics circuit designer. This paper provides a review of advances in microelectronics over the last decade or so for implantable medical devices and systems. The focus is on neural recording and stimulation circuits suitable for fabrication in modern silicon process technologies and biotelemetry methods for power and data transfer, with particular emphasis on methods employing radio frequency inductive coupling. The paper concludes by highlighting some of the issues that will drive future research in the field

Integrated circuit design for implantable neural interfaces

Progress in microfabrication technology has opened the way for new possibilities in neuroscience and medicine. Chronic, biocompatible brain implants with recording and stimulation capabilities provided by embedded electronics have been successfully demonstrated. However, more ambitious applications call for improvements in every aspect of existing implementations. This thesis proposes two prototypes that advance the field in significant ways. The first prototype is a neural recording front-end with spectral selectivity capabilities that implements a design strategy that leads to the lowest reported power consumption as compared to the state of the art. The second one is a bidirectional front-end for closed-loop neuromodulation that accounts for self-interference and impedance mismatch thus enabling simultaneous recording and stimulation. The design process and experimental verification of both prototypes is presented herein

A Multi-Channel Stimulator With High-Resolution Time-to-Current Conversion for Vagal-Cardiac Neuromodulation

This paper presents an integrated stimulator for a cardiac neuroprosthesis aiming to restore the parasympathetic control after heart transplantation. The stimulator is based on time-to-current conversion. Instead of the conventional current mode digital-to-analog converter (DAC) that uses ten of microamp for biasing, the proposed design uses a novel capacitor time-based DAC offering close to 10 bit of current amplitude resolution while using only a bias current 250 nA. The stimulator chip was design in a 0.18 m CMOS high-voltage (HV) technology. It consists of 16 independent channels, each capable of delivering 550 A stimulus current under a HV output stage that can be operated up to 30 V. Featuring both power efficiency and high-resolution current amplitude stimulation, the design is suitable for multi-channel neural simulation applications

A power efficient time-to-current stimulator for vagal-cardiac connection after heart transplantation

This paper presents a stimulator for a cardiac neuroprosthesis aiming to restore the parasympathetic control after heart transplantation. The stimulator is based on time-to-current conversion, instead of the conventional current mode digital-to-analog converter (DAC) that drives the output current mirrors. It uses a DAC based on capacitor charging to drive a power efficient voltage-to-current converter for output. The stimulator uses 1.8 V for system operation and 10 V for stimulation. The total power consumption is Istim × 10 V +18. u μW during the biphasic current output, with a maximum Istim of 512 μA. The stimulator was designed in CMOS 0.18 μm technology and post-layout simulations are presented

Design of Integrated Neural/Modular Stimulators

Ph.DDOCTOR OF PHILOSOPH

An integrated bidirectional multi-channel opto-electro arbitrary waveform stimulator for treating motor neurone disease

This paper presents a prototype integrated bidirectional stimulator ASIC capable of mixed opto-electro stimulation and electrophysiological signal recording. The development is part of the research into a fully implantable device for treating motor neurone disease using optogenetics and stem cell technology. The ASIC consists of 4 stimulator units, each featuring 16-channel optical and electrical stimulation using arbitrary current waveforms with an amplitude up to 16 mA and a frequency from 1.5 Hz to 50 kHz, and a recording front-end with a programmable bandwidth of 1 Hz to 4 kHz, and a programmable amplifier gain up to 74 dB. The ASIC was implemented in a 0.18μm CMOS technology. Simulated performance in stimulation and recording is presented

Toward an energy-efficient high-voltage compliant visual intracortical multichannel stimulator

ABSTRACT: We present, in this paper, a new multichip system aimed toward building an implantable visual intracortical stimulation device. The objective is to deliver energy-optimum pulse patterns to neural sites with needed compliance voltage across high electrode–tissue interface impedance of implantable microelectrodes. The first chip is an energy-efficient stimuli generator (SG), and the second one is a high-impedance microelectrode array driver (MED) output stage. The fourchannel SG produces rectangular, half-sine, plateau-sine, and other types of current pulse with stimulation current ranging from 2.32 to 220 μA per channel. The microelectrode array driver is able to deliver 20 V per anodic or cathodic phase across the microelectrode–tissue interface for ±13 V power supplies. The MED supplies different current levels with the maximum value of 400 μA per input and 100 μA per output channel simultaneously to 8–16 stimulation sites through microelectrodes, connected either in bipolar or monopolar configuration. Both chips receive power via inductive link and data through capacitive coupling. The SG and MED chips have been fabricated in 0.13-μm CMOS and 0.8-μm 5-/20-V CMOS/double-diffused metal-oxidesemiconductor technologies. The measured dc power budgets consumed by low- and mid-voltage chips are 2.56 and 2.1 mW consecutively. The system, modular in architecture, is interfaced with a newly developed platinum-coated pyramidal microelectrode array. In vitro test results with 0.9% phosphate buffer saline show the microelectrode impedance of 70 Ωk at 1 kHz