A reconfigurable architecture for the FFT operator in a Software Radio context

International audienceThe ”SoftWare Radio (SWR)” concept has become a topic of widespread interest for reconfigurable mobile architecture design. It is seen as the next evolutionary step in the mobile communications. In this context of SWR, a way to decrease the runtime of the software reconfiguration and to optimize the sharing between the software and the hardware of the execution platform called ”parametrization” was introduced. This technique is based on two approaches, the first one is called the Common Function approach, the second one is called the Common Operator approach. Being interested on the second parametrization technique, we propose in this paper a reconfigurable FFT (Fast Fourier Transform) operator. This operator can be reconfigured to switch from an operator dedicated to compute the FFT in the complex field (i.e for OFDM modulation or frequential equalization) to an operator which computes the FFT in the Galois Field in order to perform Reed-Solomon (RS) encoding and two steps of the decoding process

Towards a triple mode common operator FFT for Software Radio systems

International audienceA scenario to design a Triple Mode FFT is addressed. Based on a Dual Mode FFT structure, we present a methodology to reach a triple mode FFT operator (TMFFT) able to operate over three different fields: complex number domain C, Galois Fields GF(Ft) and GF(2m). We propose a reconfigurable Triple mode Multiplier that constitutes the core of the Butterflybased FFT. A scalable and flexible unit for the polynomial reduction needed in the GF(2m) multiplication is also proposed. An FPGA implementation of the proposed multiplier is given and the measures show a gain of 18%in terms of performance-to-cost ratio compared to a "Velcro" approach where two self-contained operators are implemented separately

A common operator for FFT and FEC decoding

International audienceIn the Software Radio context, the parametrization is becoming an important topic especially when it comes to multistandard designs. This paper capitalizes on the Common Operator technique to present new common structures for the FFT and FEC decoding algorithms. A key benefit of exhibiting common operators is the regular architecture it brings when implemented in a Common Operator Bank (COB). This regularity makes the architecture open to future function mapping and adapted to accommodated silicon technology variability through dependable design