Cryogenic Neuromorphic Hardware

The revolution in artificial intelligence (AI) brings up an enormous storage and data processing requirement. Large power consumption and hardware overhead have become the main challenges for building next-generation AI hardware. To mitigate this, Neuromorphic computing has drawn immense attention due to its excellent capability for data processing with very low power consumption. While relentless research has been underway for years to minimize the power consumption in neuromorphic hardware, we are still a long way off from reaching the energy efficiency of the human brain. Furthermore, design complexity and process variation hinder the large-scale implementation of current neuromorphic platforms. Recently, the concept of implementing neuromorphic computing systems in cryogenic temperature has garnered intense interest thanks to their excellent speed and power metric. Several cryogenic devices can be engineered to work as neuromorphic primitives with ultra-low demand for power. Here we comprehensively review the cryogenic neuromorphic hardware. We classify the existing cryogenic neuromorphic hardware into several hierarchical categories and sketch a comparative analysis based on key performance metrics. Our analysis concisely describes the operation of the associated circuit topology and outlines the advantages and challenges encountered by the state-of-the-art technology platforms. Finally, we provide insights to circumvent these challenges for the future progression of research

Threshold Switching and Self-Oscillation in Niobium Oxide

Volatile threshold switching, or current controlled negative differential resistance (CC-NDR), has been observed in a range of transition metal oxides. Threshold switching devices exhibit a large non-linear change in electrical conductivity, switching from an insulating to a metallic state under external stimuli. Compact, scalable and low power threshold switching devices are of significant interest for use in existing and emerging technologies, including as a selector element in high-density memory arrays and as solid-state oscillators for hardware-based neuromorphic computing. This thesis explores the threshold switching in amorphous NbOx and the properties of individual and coupled oscillators based on this response. The study begins with an investigation of threshold switching in Pt/NbOx/TiN devices as a function device area, NbOx film thickness and temperature, which provides important insight into the structure of the self-assembled switching region. The devices exhibit combined threshold-memory behaviour after an initial voltage-controlled forming process, but exhibit symmetric threshold switching when the RESET and SET currents are kept below a critical value. In this mode, the threshold and hold voltages are shown to be independent of the device area and film thickness, and the threshold power, while independent of device area, is shown to decrease with increasing film thickness. These results are shown to be consistent with a structure in which the threshold switching volume is confined, both laterally and vertically, to the region between the residual memory filament and the electrode, and where the memory filament has a core-shell structure comprising a metallic core and a semiconducting shell. The veracity of this structure is demonstrated by comparing experimental results with the predictions of a resistor network model, and detailed finite element simulations. The next study focuses on electrical self-oscillation of an NbOx threshold switching device incorporated into a Pearson-Anson circuit configuration. Measurements confirm stable operation of the oscillator at source voltages as low as 1.06 V, and demonstrate frequency control in the range from 2.5 to 20.5 MHz with maximum frequency tuning range of 18 MHz/V. The oscillator exhibit three distinct oscillation regimes: sporadic spiking, stable oscillation and damped oscillation. The oscillation frequency, peak-to-peak amplitude and frequency are shown to be temperature and voltage dependent with stable oscillation achieved for temperatures up to ∼380 K. A physics-based threshold switching model with inclusion of device and circuit parameters is shown to explain the oscillation waveform and characteristic. The final study explores the oscillation dynamics of capacitively coupled Nb/Nb2O5 relaxation oscillators. The coupled system exhibits rich collective behaviour, from weak coupling to synchronisation, depending on the negative differential resistance response of the individual devices, the operating voltage and the coupling capacitance. These coupled oscillators are shown to exhibit stable frequency and phase locking states at source voltages as low as 2.2 V with MHz frequency tunable range. The numerical simulation of the coupled system highlights the role of source voltage, and circuit and device capacitance in controlling the coupling modes and dynamics

Optimization of niobium oxide-based threshold switches for oscillator-based applications

In niobium oxide-based capacitors non-linear switching characteristics can be observed if the oxide properties are adjusted accordingly. Such non-linear threshold switching characteristics can be utilized in various non-linear circuit applications, which have the potential to pave the way for the application of new computing paradigms. Furthermore, the non-linearity also makes them an interesting candidate for the application as selector devices e.g. for non-volatile memory devices. To satisfy the requirements for those two areas of application, the threshold switching characteristics need to be adjusted to either obtain a maximized voltage extension of the negative differential resistance region in the quasi-static I-V characteristics, which enhances the non-linearity of the devices and results in improved robustness to device-to-device variability or to adapt the threshold voltage to a specific non-volatile memory cell. Those adaptations of the threshold switching characteristics were successfully achieved by deliberate modifications of the niobium oxide stack. Furthermore, the impact of the material stack on the dynamic behavior of the threshold switches in non-linear circuits as well as the impact of the electroforming routine on the threshold switching characteristics were analyzed. The optimized device stack was transferred from the micrometer-sized test structures to submicrometer-sized devices, which were packaged to enable easy integration in complex circuits. Based on those packaged threshold switching devices the behavior of single as well as of coupled relaxation oscillators was analyzed. Subsequently, the obtained results in combination with the measurement results for the statistic device-to-device variability were used as a basis to simulate the pattern formation in coupled relaxation oscillator networks as well as their performance in solving graph coloring problems. Furthermore, strategies to adapt the threshold voltage to the switching characteristics of a tantalum oxide-based non-volatile resistive switch and a non-volatile phase change cell, to enable their application as selector devices for the respective cells, were discussed.:Abstract I Zusammenfassung II List of Abbrevations VI List of Symbols VII 1 Motivation 1 2 Basics 5 2.1 Negative differential resistance and local activity in memristor devices 5 2.2 Threshold switches as selector devices 8 2.3 Switching effects observed in NbOx 13 2.3.1 Threshold switching caused by metal-insulator transition 13 2.3.2 Threshold switching caused by Frenkel-Poole conduction 18 2.3.3 Non-volatile resistive switching 32 3 Sample preparation 35 3.1 Deposition techniques 35 3.1.1 Evaporation 35 3.1.2 Sputtering 36 3.2 Micrometer-sized devices 36 3.3 Submicrometer-sized devices 37 3.3.1 Process flow 37 3.3.2 Reduction of the electrode resistance 39 3.3.3 Transfer from structuring via electron beam lithography to structuring via laser lithography 48 3.3.4 Packaging procedure 50 4 Investigation and optimization of the electrical device characteristic 51 4.1 Introduction 51 4.2 Measurement setup 52 4.3 Electroforming 53 4.3.1 Optimization of the electroforming process 53 4.3.2 Characterization of the formed filament 62 4.4 Dynamic device characteristics 67 4.4.1 Emergence and measurement of dynamic behavior 67 4.4.2 Impact of the dynamic device characteristics on quasi-static I-V characteristics 70 5 Optimization of the material stack 81 5.1 Introduction 81 5.2 Adjustment of the oxygen content in the bottom layer 82 5.3 Influence of the thickness of the oxygen-rich niobium oxide layer 92 5.4 Multilayer stacks 96 5.5 Device-to-device and Sample-to-sample variability 110 6 Applications of NbOx-based threshold switching devices 117 6.1 Introduction 117 6.2 Non-linear circuits 117 6.2.1 Coupled relaxation oscillators 117 6.2.2 Memristor Cellular Neural Network 121 6.2.3 Graph Coloring 127 6.3 Selector devices 132 7 Summary and Outlook 138 8 References 141 9 List of publications 154 10 Appendix 155 10.1 Parameter used for the LT Spice simulation of I-V curves for threshold switches with varying oxide thicknesses 155 10.2 Dependence of the oscillation frequency of the relaxation oscillator circuit on the capacitance and the applied source voltage 156 10.3 Calculation of the oscillation frequency of the relaxation oscillator circuit 157 10.4 Characteristics of the memristors and the cells utilized in the simulation of the memristor cellular neural network 164 10.5 Calculation of the impedance of the cell in the memristor cellular network 166 10.6 Example graphs from the 2nd DIMACS series 179 11 List of Figures 182 12 List of Tables 19

Filamentary Threshold Switching In Niobium Oxides

Two-terminal metal/oxide/metal (MOM) structures exhibit characteristic resistance changes, including non-volatile memory and volatile threshold switching responses when subjected to electrical stress (i.e., voltage or current stimuli), which are of interest as active elements in non-volatile memory arrays and neuromorphic computing. Recently, the threshold switching response in MOM devices based on vanadium oxides and niobium oxides have attracted particular attention due to their simple structure and reliability. Interestingly, specific phases of these oxides (e.g., VO2, NbO2 etc.) exhibit a metal-insulator transition (MIT) which causes dramatic changes in their intrinsic properties, including electrical and thermal conductivities, and often arguably reported as the dominant cause of the observed threshold switching response. While this response has been extensively studied for VO2, but the low transition temperature (~ 340K) limits their use only to low temperature microelectronics applications. In contrast, NbO2 has a much higher transition temperature ~ 1070 K, and NbO2 and other NbOx phases have drawn recent attention due to their reliable threshold switching characteristics. The resistance changes in MOM structures are often initiated by a one-step electroforming process that forms a filamentary conduction path. Knowledge about the structure, composition and spatial distribution of these filaments is essential for a full understanding of filamentary resistive/threshold-switching and for effective modelling and optimisation of associated devices. Additionally, NbOx-based devices exhibit a wide range of resistive and threshold switching responses that critically depend on operating condition, composition and device geometry. Thus, a proper understanding of these factors is important for achieving reliable switching with desired characteristics. This thesis focuses on understanding the electroforming process and subsequent threshold switching responses in NbOx by employing different techniques, including electrical testing, and thermo-reflectance imaging. At first, a simple means of detecting and spatially mapping conductive filaments in metal/oxide/metal cross-point devices is introduced and the utility of this technique is demonstrated to identify distinct modes of electroforming in low- and high-conductivity NbOx films. After that, the role of metal/oxide interface reactions on the post-forming characteristics of reactive-metal/Nb2O5/Pt devices is demonstrated. Specifically, devices are shown to exhibit stable threshold switching under negative bias but the response under positive bias depends on the choice of metal. Then, the threshold-switching and current-controlled negative differential resistance (NDR) characteristics of cross-point devices fabricated from undoped Nb2O5 and Ti-doped Nb2O5 are compared. In particular it is shown that doping offers an effective means of engineering the device response. Based on temperature dependent current-voltage characteristics and lumped-element modelling, these effects are attributed to doping-induced reductions in the device resistance and its rate of change with temperature. Finally, the physical origin of the discontinuous 'snapback' NDR is investigated. Specifically, it is shown that the snapback response is a direct consequence of current localisation and redistribution within the oxide film. Furthermore, it is demonstrated that material and device dependencies are consistent with predictions of a two-zone parallel memristor model of NDR which is based on a non-uniform current distribution after electroforming. These results advance the current understanding of threshold switching response in amorphous NbOx films, and provide a strong basis for engineering devices with specific NDR characteristics. Significantly, these results also resolve a long-standing controversy about the origin of the snapback response which has been a subject of considerable debate

Dynamic Memristors: from Devices to Applications

Memristors have been extensively studied as a promising candidate for next generation non-volatile memory technology. More recently, memristors have also become extremely popular in neuromorphic applications because of their striking resemblance to biological synapses. The memristor was firstly proposed conceptually as the fourth basic electric circuit element whose resistance is dependent on the history of electrical stimulation. Physical implementations of memristors are normally based a solid state, nanoscale metal-insulator-metal (MIM) sandwich structure, and the resistance change is achieved by controlling the ion (either cation or anion) redistribution inside the insulating/switching layer. Specifically, a conductive filament can be formed with a high-concentration of metal cations or oxygen vacancies, leading to an increase in device conductance during set, and a decrease in device conductance during reset associated with the annihilation of the filament. Devices based on such resistive switching mechanisms are often termed resistive random-access memory (RRAM) devices, and offer advantages of simple structure, high density, low power, good endurance, etc. for memory and computing applications. In this dissertation, two kinds of memristor devices will be discussed, using Ag2S and WOx as the switching material, respectively. The WOx device allows incremental modulation of the device conductance, and enables efficient hardware emulation of important synaptic learning functions including paired pulse facilitation, sliding threshold effect, rate dependent plasticity and spike timing dependent plasticity (Chapter 3), showing the resemblance between memristors and biological synapses. Neural networks based on the memristor crossbar array have been used to successfully perform image reconstruction tasks based on the sparse coding algorithm (Chapter 2). A 32×32 WOx memristor crossbar array was used for vector-matrix multiplication acceleration, and the device non-ideality effects in the memristor crossbar array on the image reconstruction performance were examined. Additionally, interesting short-term decay dynamics can be observed in both Ag2S and WOx based devices. Different from the requirements of non-volatile memory which aims for long term memory storage, the volatile nature of these devices can be used to directly encode and process temporal information. Specifically, the Ag2S memristor can encode different neural spiking information in the temporal domain into analog switching probability distributions (Chapter 5). These devices are termed “dynamic memristors” and can be applied in novel computing schemes such as reservoir computing systems for efficient temporal information processing including speech recognition (Chapter 4). Both devices show very promising properties for neuromorphic computing – overcoming the von-Neumann bottleneck by incorporating information processing into memory storage. It is believed in the future, very efficient neuromorphic computing chips can be designed and implemented using these memristors that offer potential advantages in terms of area consumption, computing speed and power consumption.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/144102/1/wenma_1.pd

Phase Noise Analyses and Measurements in the Hybrid Memristor-CMOS Phase-Locked Loop Design and Devices Beyond Bulk CMOS

Phase-locked loop (PLLs) has been widely used in analog or mixed-signal integrated circuits. Since there is an increasing market for low noise and high speed devices, PLLs are being employed in communications. In this dissertation, we investigated phase noise, tuning range, jitter, and power performances in different architectures of PLL designs. More energy efficient devices such as memristor, graphene, transition metal di-chalcogenide (TMDC) materials and their respective transistors are introduced in the design phase-locked loop. Subsequently, we modeled phase noise of a CMOS phase-locked loop from the superposition of noises from its building blocks which comprises of a voltage-controlled oscillator, loop filter, frequency divider, phase-frequency detector, and the auxiliary input reference clock. Similarly, a linear time-invariant model that has additive noise sources in frequency domain is used to analyze the phase noise. The modeled phase noise results are further compared with the corresponding phase-locked loop designs in different n-well CMOS processes. With the scaling of CMOS technology and the increase of the electrical field, the problem of short channel effects (SCE) has become dominant, which causes decay in subthreshold slope (SS) and positive and negative shifts in the threshold voltages of nMOS and pMOS transistors, respectively. Various devices are proposed to continue extending Moore\u27s law and the roadmap in semiconductor industry. We employed tunnel field effect transistor owing to its better performance in terms of SS, leakage current, power consumption etc. Applying an appropriate bias voltage to the gate-source region of TFET causes the valence band to align with the conduction band and injecting the charge carriers. Similarly, under reverse bias, the two bands are misaligned and there is no injection of carriers. We implemented graphene TFET and MoS2 in PLL design and the results show improvements in phase noise, jitter, tuning range, and frequency of operation. In addition, the power consumption is greatly reduced due to the low supply voltage of tunnel field effect transistor