Fast And Accurate Receiver Jitter Tolerance Extrapolation Using The Q-Factor Linear Fitting Method

A performance bit rates of more than 6 Gb/s is deemed as a common standard in high-speed interconnect system in conjunction with the recent enhancement of high-speed serial interface (HSSI). In industry, receiver (Rx) jitter tolerance (JTOL) measurement required to characterize the high-speed interconnect. Time required for conventional methods to complete Rx JTOL measurement for low bit error rate (BER) values normally took a week’s time depending on the data rate. In addition, a large number of bits is required to be transmitted hence resulting measurement cost as inefficient. This research project implements a method known as Q-factor linear fitting method to reduce the measurement time of the Rx JTOL at low BER by using high BER data. The result shows that the measurement of Rx JTOL using Q-factor linear fitting method using BER 10-10 data achieved 11x speed-up in comparison to direct measurement of Rx JTOL. The proposed methods of combined different level of BER values and increase more data points of higher BER able to significantly improve the accuracy of the Rx JTOL measurement result. The proposed method is successfully established in the experiment where the results obtained indicated relative error of Rx JTOL using Q-factor linear fitting method of BER 10-10 data are reduced from 9.47% to 3.31% after combining with the BER 10-11 data and relative error for Rx JTOL extrapolation measurement using BER 10-10 data at low temperature (-25˚C) is reduced from 9.47% to 5.43% by increasing the measurement data point from 20 data points to 30 data point

Low Cost and Compact Quantum Cryptography

We present the design of a novel free-space quantum cryptography system, complete with purpose-built software, that can operate in daylight conditions. The transmitter and receiver modules are built using inexpensive off-the-shelf components. Both modules are compact allowing the generation of renewed shared secrets on demand over a short range of a few metres. An analysis of the software is shown as well as results of error rates and therefore shared secret yields at varying background light levels. As the system is designed to eventually work in short-range consumer applications, we also present a use scenario where the consumer can regularly 'top up' a store of secrets for use in a variety of one-time-pad and authentication protocols.Comment: 18 pages, 9 figures, to be published in New Journal of Physic

HopScotch - a low-power renewable energy base station network for rural broadband access

The provision of adequate broadband access to communities in sparsely populated rural areas has in the past been severely restricted. In this paper, we present a wireless broadband access test bed running in the Scottish Highlands and Islands which is based on a relay network of low-power base stations. Base stations are powered by a combination of renewable sources creating a low cost and scalable solution suitable for community ownership. The use of the 5~GHz bands allows the network to offer large data rates and the testing of ultra high frequency ``white space'' bands allow expansive coverage whilst reducing the number of base stations or required transmission power. We argue that the reliance on renewable power and the intelligent use of frequency bands makes this approach an economic green radio technology which can address the problem of rural broadband access

Technology Implications of UWB on Wireless Sensor Network-A detailed Survey

In today’s high tech “SMART” world sensor based networks are widely used. The main challenge with wireless-based sensor networks is the underneath physical layer. In this survey, we have identified core obstacles of wireless sensor network when UWB is used at PHY layer. This research was done using a systematic approach to assess UWB’s effectiveness (for WSN) based on information taken from various research papers, books, technical surveys and articles. Our aim is to measure the UWB’s effectiveness for WSN and analyze the different obstacles allied with its implementation. Starting from existing solutions to proposed theories. Here we have focused only on the core concerns, e.g. spectrum, interference, synchronization etc.Our research concludes that despite all the bottlenecks and challenges, UWB’s efficient capabilities makes it an attractive PHY layer scheme for the WSN, provided we can control interference and energy problems. This survey gives a fresh start to the researchers and prototype designers to understand the technological concerns associated with UWB’s implementatio

Pengetahuan dan minat terhadap kerjaya keushawanan : satu tinjauan di kalangan pelajar-pelajar bumiputera aliran kemahiran

Kajian ini adalah berkaitan dengan keIjaya keusahawanan di kalangan pelajar-pelajar bumiputera aliran kemahiran. Tujuan kajian ini diadakan adalah untuk melihat sarna ada pelajar-pelajar ini mempunyai pengetahuan dan minat terhadap keIjaya keusahawanan, atau tidak. Soal selidik telah diedarkan kepada 48 orang responden, dan kursus Teknologi Kejuruteraan A\\'am (Bangunan) di Institut Kemahiran Mara (l1Ovf), Manjung, Perak Darul Ridzuan. Data yang diperolehi dianalisis menggunakan pensian Srarv,·rical Package For Social Science (SPSS). Hasil analisis menunjukkan nilai skor min untuk kesemua item berada pad a tahap yang memuaskan. Ini membuktikan bahawa pelajar-pelajar bumiputera aliran kemahiran sememangnya mempunyai pengetahuan dan minat terhadap keIjaya keusahawanan. \Valaupun mempunyai pengetahuan dan minat terhadap keIjaya keusahawanan, mereka masih kekurangan maklumat berkenaan prosedur memulakan pemiagaan serta badan atau organisasi yang memberi kemudahan dana kewangan. Oleh yang demikian, 'Panduall Ringkas Mellceburi Bidang Keusahawanall' dihasilkan untuk memben maklumat ten tang langkah-langkah yang perlu dilakukan untuk memulakan sesuatu pemiagaan serta badan atau organisasi yang memben kemudahan dana kewangan, kepada para pelajar

Experimental Evaluation and Comparison of Time-Multiplexed Multi-FPGA Routing Architectures

Emulating large complex designs require multi-FPGA systems (MFS). However, inter-FPGA communication is confronted by the challenge of lack of interconnect capacity due to limited number of FPGA input/output (I/O) pins. Serializing parallel signals onto a single trace effectively addresses the limited I/O pin obstacle. Besides the multiplexing scheme and multiplexing ratio (number of inter-FPGA signals per trace), the choice of the MFS routing architecture also affect the critical path latency. The routing architecture of an MFS is the interconnection pattern of FPGAs, fixed wires and/or programmable interconnect chips. Performance of existing MFS routing architectures is also limited by off-chip interface selection. In this dissertation we proposed novel 2D and 3D latency-optimized time-multiplexed MFS routing architectures. We used rigorous experimental approach and real sequential benchmark circuits to evaluate and compare the proposed and existing MFS routing architectures. This research provides a new insight into the encouraging effects of using off-chip optical interface and three dimensional MFS routing architectures. The vertical stacking results in shorter off-chip links improving the overall system frequency with the additional advantage of smaller footprint area. The proposed 3D architectures employed serialized interconnect between intra-plane and inter-plane FPGAs to address the pin limitation problem. Additionally, all off-chip links are replaced by optical fibers that exhibited latency improvement and resulted in faster MFS. Results indicated that exploiting third dimension provided latency and area improvements as compared to 2D MFS. We also proposed latency-optimized planar 2D MFS architectures in which electrical interconnections are replaced by optical interface in same spatial distribution. Performance evaluation and comparison showed that the proposed architectures have reduced critical path delay and system frequency improvement as compared to conventional MFS. We also experimentally evaluated and compared the system performance of three inter-FPGA communication schemes i.e. Logic Multiplexing, SERDES and MGT in conjunction with two routing architectures i.e. Completely Connected Graph (CCG) and TORUS. Experimental results showed that SERDES attained maximum frequency than the other two schemes. However, for very high multiplexing ratios, the performance of SERDES & MGT became comparable

Stable local oscillator module.

This report gives a description of the development of a Stable Local Oscillator (StaLO) multi-chip module (MCM). It is a follow-on report to SAND2006-6414, Stable Local Oscillator Microcircuit. The StaLO accepts a 100MHz input signal and produces output signals at 1.2, 3.3, and 3.6 GHz. The circuit is built as a multi-chip module (MCM), since it makes use of integrated circuit technologies in silicon and lithium niobate as well as discrete passive components. This report describes the development of an MCM-based version of the complete StaLO, fabricated on an alumina thick film hybrid substrate

Research on low power technology by AC power supply circuits

制度:新 ; 報告番号:甲3692号 ; 学位の種類:博士(工学) ; 授与年月日:2012/9/15 ; 早大学位記番号:新6060Waseda Universit