16 research outputs found

    Low jitter design techniques for monolithic CMOS phase-locked and delay-locked systems

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    Timing jitter is a major concern in almost every type of communication system. Yet the desire for high levels of integration works against minimization of this error, especially for systems employing a phase-locked loop (PLL) or delay-locked loop (DLL) for timing generation or timing recovery. There has been an increasing demand for fully-monolithic CMOS PLL and DLL designs with good jitter performance. In this thesis, the system level as well as the transistor level low jitter design techniques for integrated PLLs and DLLs have been explored.;On the system level, a rigorous jitter analysis method based on a z-domain model is developed, in which the jitter is treated as a random event. Combined with statistical methods, the rms value of the accumulated jitter can be expressed with a closed form solution that successfully ties the jitter performance with loop parameters. Based on this analysis, a cascaded PLL/DLL structure is proposed which combines the advantage of both loops. The resulting system is able to perform frequency synthesis with the jitter as low as that of a DLL.;As an efficient tool to predict the jitter performance of a PLL or DLL system, a new nonlinear behavioral simulator is developed based on a novel behavioral modeling of the VCO and delay-line. Compared with prior art, this simulator not only simplifies the computation but also enables the noise simulation. Both jitter performance during tracking and lock condition can be predicted. This is also the first reported top-level simulation tool for DLL noise simulation.;On the transistor level, three prototype chips for different applications were implemented and tested. The first two chips are the application of PLL in Gigabit fibre channel transceivers. High speed circuit blocks that have good noise immunity are the major design concern. Testing results show that both designs have met the specifications with low power dissipation. For the third chip, an adaptive on-chip dynamic skew calibration technique is proposed to realize a precise delay multi-phase clock generator, which is a topic that has not been addressed in previous work thus far. Experimental results strongly support the effectiveness of the calibration scheme. At the same time, this design achieves by far the best reported jitter performance

    Topical Workshop on Electronics for Particle Physics

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    The purpose of the workshop was to present results and original concepts for electronics research and development relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities; to review the status of electronics for the LHC experiments; to identify and encourage common efforts for the development of electronics; and to promote information exchange and collaboration in the relevant engineering and physics communities

    Topical Workshop on Electronics for Particle Physics

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    Single-Laser Multi-Terabit/s Systems

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    Optical communication systems carry the bulk of all data traffic worldwide. This book introduces multi-Terabit/s transmission systems and three key technologies for next generation networks. A software-defined multi-format transmitter, an optical comb source and an optical processing scheme for the fast Fourier transform for Tbit/s signals. Three world records demonstrate the potential: The first single laser 10 Tbit/s and 26 Tbit/s OFDM and the first 32.5 Tbit/s Nyquist WDM experiments

    Single-Laser Multi-Terabit/s Systems

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    Optical communication systems carry the bulk of all data traffic worldwide. This book introduces multi-Terabit/s transmission systems and three key technologies for next generation networks. A software-defined multi-format transmitter, an optical comb source and an optical processing scheme for the fast Fourier transform for Tbit/s signals. Three world records demonstrate the potential: The first single laser 10 Tbit/s and 26 Tbit/s OFDM and the first 32.5 Tbit/s Nyquist WDM experiments

    Pre-phase A: Development of a far-ultraviolet photometric- and spectroscopic-survey small-explorer experiment

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    We propose to perform a far ultraviolet photometric and spectroscopic survey covering the lambda lambda 1300-2000 band with a sensitivity comparable to that of the Palomar Sky Survey. This survey will proceed in three phases: an all-sky survey in three bands to 18-19.5(sup m), deep surveys of selected targets of interest in the same bands to 21-22(sup m), and a spectroscopic survey of 2 percent of the sky to 18(sup m) with a resolution of 3-20A. This mission, the Joint Ultraviolet Nightsky Observer (JUNO), can be performed by a Small-Explorer-class satellite

    Optical Injection Locking for Enhanced Performance of Optical Communication Systems

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