4,545 research outputs found

    Design and Implementation of a FPGA and DSP Based MIMO Radar Imaging System

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    The work presented in this paper is aimed at the implementation of a real-time multiple-input multiple-output (MIMO) imaging radar used for area surveillance. In this radar, the equivalent virtual array method and time-division technique are applied to make 16 virtual elements synthesized from the MIMO antenna array. The chirp signal generater is based on a combination of direct digital synthesizer (DDS) and phase locked loop (PLL). A signal conditioning circuit is used to deal with the coupling effect within the array. The signal processing platform is based on an efficient field programmable gates array (FPGA) and digital signal processor (DSP) pipeline where a robust beamforming imaging algorithm is running on. The radar system was evaluated through a real field experiment. Imaging capability and real-time performance shown in the results demonstrate the practical feasibility of the implementation

    DeSyRe: on-Demand System Reliability

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    The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect and fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints

    Communication system for a tooth-mounted RF sensor used for continuous monitoring of nutrient intake

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    In this Thesis, the communication system of a wearable device that monitors the user’s diet is studied. Based in a novel RF metamaterial-based mouth sensor, different decisions have to be made concerning the system’s technologies, such as the power source options for the device, the wireless technology used for communications and the method to obtain data from the sensor. These issues, along with other safety rules and regulations, are reviewed, as the first stage of development of the Food-Intake Monitoring projectOutgoin

    Energy-Efficiency in Optical Networks

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    Silicon-Organic Hybrid (SOH) Mach-Zehnder Modulators for 100 Gbit/s On-Off Keying

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    Electro-optic modulators for high-speed on-off keying (OOK) are key components of short- and mediumreach interconnects in data-center networks. Besides small footprint and cost-efficient large-scale production, small drive voltages and ultra-low power consumption are of paramount importance for such devices. Here we demonstrate that the concept of silicon-organic hybrid (SOH) integration is perfectly suited for meeting these challenges. The approach combines the unique processing advantages of large-scale silicon photonics with unrivalled electro-optic (EO) coefficients obtained by molecular engineering of organic materials. In our proof-of-concept experiments, we demonstrate generation and transmission of OOK signals with line rates of up to 100 Gbit/s using a 1.1 mm-long SOH Mach-Zehnder modulator (MZM) which features a {\pi}-voltage of only 0.9 V. This experiment represents not only the first demonstration of 100 Gbit/s OOK on the silicon photonic platform, but also leads to the lowest drive voltage and energy consumption ever demonstrated at this data rate for a semiconductor-based device. We support our experimental results by a theoretical analysis and show that the nonlinear transfer characteristic of the MZM can be exploited to overcome bandwidth limitations of the modulator and of the electric driver circuitry. The devices are fabricated in a commercial silicon photonics line and can hence be combined with the full portfolio of standard silicon photonic devices. We expect that high-speed power-efficient SOH modulators may have transformative impact on short-reach optical networks, enabling compact transceivers with unprecedented energy efficiency that will be at the heart of future Ethernet interfaces at Tbit/s data rates

    Field-Trial of a high-budget, filterless, lambda-to-the-user, UDWDM-PON enabled by an innovative class of low-cost coherent transceivers

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    ©2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.We experimentally demonstrate an innovative ultradense wavelength division multiplexing (UDWDM) passive optical networks (PON) that implements the full ¿-to-the-user concept in a filterless distribution network. Key element of the proposed system is a novel class of coherent transceivers, purposely developed with a nonconventional technical approach. Indeed, they are designed and realized to avoid D/A-A/D converter stages and digital signal processing in favor of simple analog processing so that they match system, cost, and power consumption requirements of the access networks without sacrificing the overall performance. These coherent transceivers target different use case scenarios (residential, business, fixed, wireless) still keeping perfect compatibility and co-existence with legacy infrastructures installed to support gray, time division multiplexed PON systems. Moreover, the availability of coherent transceivers of different cost/performance ratios allows for deployments of different quality service grades. In this paper, we report the successful field trial of the proposed systems in a testbed where 14 UDWDM channels (and one legacy E-PON system) are transmitted simultaneously in a dark-fiber network deployed in the city of Pisa (Italy), delivering real-time and/or test traffic. The trial demonstrated filterless operations (each remote node selects individually its own UDWDM channel on a fine 6.25-GHz grid), real-time GbE transmissions (by using either fully analog or light digital signal processing), multirate transmission (1.25 and 10 Gb/s), high optical distribution network loss (18-40 dB) as well as a bidirectional channel monitoring system.Peer ReviewedPostprint (author's final draft

    A Novel Three-Point Modulation Technique for Fractional-N Frequency Synthesizer Applications

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    This paper presents a novel three-point modulation technique for fractional-N frequency synthesizer applications. Convention modulated fractional-N frequency synthesizers suffer from quantization noise, which degrades not only the phase noise performance but also the modulation quality. To solve this problem, this work proposes a three-point modulation technique, which not only cancels the quantization noise, but also markedly boosts the channel switching speed. Measurements reveal that the implemented 2.4 GHz fractional-N frequency synthesizer using three-point modulation can achieve a 2.5 Mbps GFSK data rate with an FSK error rate of only 1.4 %. The phase noise is approximately -98 dBc/Hz at a frequency offset of 100 kHz. The channel switching time is only 1.1 ÎĽs with a frequency step of 80 MHz. Comparing with conventional two-point modulation, the proposed three-point modulation greatly improves the FSK error rate, phase noise and channel switching time by about 10 %, 30 dB and 126 ÎĽs, respectively
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