High-frequency two-input CMOS OTA for continuous-time filter applications

“This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.”A high-frequency fully differential CMOS operational transconductance amplifier (OTA) is presented for continuous-time filter applications in the megahertz range. The proposed design technique combines a linear cross-coupled quad input stage with an enhanced folded-cascode circuit to increase the output resistance of the amplifier. SPICE simulations show that DC-gain enhancement can be obtained without significant bandwidth limitation. The two-input OTA developed is used in high-frequency tuneable filter design based on IFLF and LC ladder simulation structures. Simulated results of parameters and characteristics of the OTA and filters in a standard 1.2 μm CMOS process (MOSIS) are presented. A tuning circuit is also discussed.Peer reviewe

Current and Voltage Mode Multiphase Sinusoidal Oscillators Using CBTAs

Current-mode (CM) and voltage-mode (VM) multiphase sinusoidal oscillator (MSO) structures using current backward transconductance amplifier (CBTA) are proposed. The proposed oscillators can generate n current or voltage signals (n being even or odd) equally spaced in phase. n+1 CBTAs, n grounded capacitors and a grounded resistor are used for nth-state oscillator. The oscillation frequency can be independently controlled through transconductance (gm) of the CBTAs which are adjustable via their bias currents. The effects caused by the non-ideality of the CBTA on the oscillation frequency and condition have been analyzed. The performance of the proposed circuits is demonstrated on third-stage and fifth-stage MSOs by using PSPICE simulations based on the 0.25 µm TSMC level-7 CMOS technology parameters

A Low-Voltage Floating-Gate MOS Biquad

A second-order gm-C filter based on the Floating-Gate MOS (FGMOS) technique is presented. It uses a new fully differential transconductor and works at 2 V of voltage supply with a full differential input linear range and a THD below 1%. Programming and tuning are performed by means of a single voltage signal. The transconductor incorporates a novel Common-Mode Feedback Circuit (CMFB) based also on FGMOS transistors.España, CICYT TIC-97-064

Power-efficient current-mode analog circuits for highly integrated ultra low power wireless transceivers

In this thesis, current-mode low-voltage and low-power techniques have been applied to implement novel analog circuits for zero-IF receiver backend design, focusing on amplification, filtering and detection stages. The structure of the thesis follows a bottom-up scheme: basic techniques at device level for low voltage low power operation are proposed in the first place, followed by novel circuit topologies at cell level, and finally the achievement of new designs at system level. At device level the main contribution of this work is the employment of Floating-Gate (FG) and Quasi-Floating-Gate (QFG) transistors in order to reduce the power consumption. New current-mode basic topologies are proposed at cell level: current mirrors and current conveyors. Different topologies for low-power or high performance operation are shown, being these circuits the base for the system level designs. At system level, novel current-mode amplification, filtering and detection stages using the former mentioned basic cells are proposed. The presented current-mode filter makes use of companding techniques to achieve high dynamic range and very low power consumption with for a very wide tuning range. The amplification stage avoids gain bandwidth product achieving a constant bandwidth for different gain configurations using a non-linear active feedback network, which also makes possible to tune the bandwidth. Finally, the proposed current zero-crossing detector represents a very power efficient mixed signal detector for phase modulations. All these designs contribute to the design of very low power compact Zero-IF wireless receivers. The proposed circuits have been fabricated using a 0.5μm double-poly n-well CMOS technology, and the corresponding measurement results are provided and analyzed to validate their operation. On top of that, theoretical analysis has been done to fully explore the potential of the resulting circuits and systems in the scenario of low-power low-voltage applications.Programa Oficial de Doctorado en Tecnologías de las Comunicaciones (RD 1393/2007)Komunikazioen Teknologietako Doktoretza Programa Ofiziala (ED 1393/2007

Low-Voltage Ultra-Low-Power Current Conveyor Based on Quasi-Floating Gate Transistors

The field of low-voltage low-power CMOS technology has grown rapidly in recent years; it is an essential prerequisite particularly for portable electronic equipment and implantable medical devices due to its influence on battery lifetime. Recently, significant improvements in implementing circuits working in the low-voltage low-power area have been achieved, but circuit designers face severe challenges when trying to improve or even maintain the circuit performance with reduced supply voltage. In this paper, a low-voltage ultra-low-power current conveyor second generation CCII based on quasi-floating gate transistors is presented. The proposed circuit operates at a very low supply voltage of only ±0.4 V with rail-to-rail voltage swing capability and a total quiescent power consumption of mere 9.5 µW. Further, the proposed circuit is not only able to process the AC signal as it's usual at quasi-floating gate transistors but also the DC which extends the applicability of the proposed circuit. In conclusion, an application example of the current-mode quadrature oscillator is presented. PSpice simulation results using the 0.18 µm TSMC CMOS technology are included to confirm the attractive properties of the proposed circuit

Electronically Tunable Current-mode High-order Ladder Low-pass Filters Based on CMOS Technology

This paper describes the design of current mode low-pass ladder filters based on CMOS technology. The filters are derived from passive RLC ladder filter prototypes using new CMOS lossy and lossless integrators. The all-pole and Elliptic approximations are used in the proposed low-pass filter realizations. The proposed two types of filter can be electronically tuned between 10kHz and 100MHz through bias current from 0.03µA to 300µA. The proposed filters use 1.5 V power supply with 3 mW power consumption at 300 µA bias current. The proposed filters are resistorless, use grounded capacitors and are suitable for further integration. The total harmonic distortion (THD) of the low-pass filters is less than 1% over the operating frequency range. PSPICE simulation results, obtained by using TSMC 0.18µm technology, confirm the presented theory

A very compact KHN filter with multidecade tuning

A very compact implementation of a multifunction Kerwin Huelsman Newcomb (KHN) filter that can be frequency tuned almost seven decades, from 0.2 Hz to 1 Mhz, is presented. Tuning is achieved by means of high-value, programmable active resistors biased using the quasi floating gate (QFG) technique and linearisated through capacitive gate voltage averaging. The circuit, realized in a 0.5 μm standard CMOS technology using only four CMOS inverters, six small capacitors, six small resistors and two programmable active resistors, occupies a total area of 0.02 mm2, dissipates 3.45 mW and presents a dynamic range at 0.1 % THD of 55.86