4 research outputs found

    A Wideband Supply Modulator for 20 MHz RF Bandwidth Polar PAs in 65 nm CMOS

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    A wideband supply modulator for 20MHz RF bandwidth polar PAs in 65nm CMOS

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    A wideband modulator for a 20MHz bandwidth polar modulated PA is presented which achieves a maximum efficiency of 87.5% and a small signal -3dB bandwidth of 285MHz. Realized in 65nm CMOS, it consists of a cascoded nested Miller compensated linear amplifier and a class D switching amplifier. It can deliver 22.7dBm output power to a 5.3Ω load. With a switching frequency of 118MHz, the output switching ripple is 4.3mVrms. Keywords: supply modulator, power amplifier, CMOS and cascoded nested Miller

    An Efficient Supply Modulator for Linear Wideband RF Power Amplifiers

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    Radio Frequency (RF) Power Amplifiers are responsible for a considerable amount of the power consumption in the entire transmitter-receiver (transceiver) of modern communication systems. The stringent linearity requirements of multi-standard transceivers to minimize cross-talking effects makes Linear Power Amplifiers, particularly class A, the preferred choice in broadband transceivers. This linearity requirement coupled with the fact that the Power Amplifier operates at low transmit power during most of its operation makes the efficiency of the entire transceiver poor. The limited transceiver efficiency leads to a reduction in the battery life of battery operated portable devices like mobile phones; hence drastically limiting talk time. To alleviate this issue, several research groups propose solutions to improve PA power efficiency. However, these solutions usually have a low efficiency at low power and are mostly limited to narrow bandwidth applications. In this thesis, the efficiency of a class A Power amplifier in wideband wireless standards like WiMax is improved by dynamically controlling the bias current and supply voltage of the PA. An efficient supply modulator based on a switching regulator architecture is proposed for controlling the supply voltage. The switching regulator is found to be slew-limited by the bulky inductor and capacitor used to regulate the supply voltage. The proposed solution alleviates the slew rate limitation by adding a bang-bang controlled current source. The proposed supply modulator has an average power efficiency of 81.6 percent and is suitable for wireless standards with bandwidths up to 20MHz compared to the relatively lower efficiencies and bandwidths of state of the art modulators. A class-A PA is shown to promise an average power efficiency of 21.3 percent when the bias current is controlled dynamically and the supply voltage is varied using the proposed supply modulator. This is a significant improvement over the poor average efficiency of 1.06 percent for a fixed bias conventional linear class A PA. The project has been simulated using the TSMC 0.18 micrometer technology

    Design and implementation of an Envelope tracking Power Amplifier using switched Amplifiers and slow Envelopes

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    English: This master thesis presents the design and implementation of an Envelope Tracking (ET) transmitter including an envelope amplifier based on switched power amplifiers and algorithms for slew-rate and bandwidth reduction. The ET transmitter here presented constitutes a research environment that will allow investigate possible solutions to solve the linearity-efficiency trade-off of the power amplifiers. The design and implementation of the envelope amplifier includes commercial switching devices driven by pulsed signals generated by a Field Programmable Gate Array (FPGA). The pulsed signals are modulated using Pulse Width Modulation and Delta-Sigma Modulation aimed to achieve a high efficient amplification. The signals, amplitudes, modulation frequencies and bandwidths used during the design and implementation are compatible with current communications standards. This master thesis also presents a new algorithm for reduction of the envelope bandwidth as well as improvements over the existing slew-rate reduction algorithm presented in a previous publication. These improvements were implemented in the FPGA and validated in the implemented transmitter. Results show that switching amplification is limited by the availability of current technologies in this field and the algorithms for reducing slew rate and bandwidth of the envelope are suitable to overcome this limitation while new technologies allow higher switching frequencies
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