69,074 research outputs found

    Modeling Accuracy and Variability of Motor Timing in Treated and Untreated Parkinson’s Disease and Healthy Controls

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    Parkinson’s disease (PD) is characterized by difficulty with the timing of movements. Data collected using the synchronization–continuation paradigm, an established motor timing paradigm, have produced varying results but with most studies finding impairment. Some of this inconsistency comes from variation in the medication state tested, in the inter-stimulus intervals (ISI) selected, and in changeable focus on either the synchronization (tapping in time with a tone) or continuation (maintaining the rhythm in the absence of the tone) phase. We sought to re-visit the paradigm by testing across four groups of participants: healthy controls, medication naïve de novo PD patients, and treated PD patients both “on” and “off” dopaminergic medication. Four finger tapping intervals (ISI) were used: 250, 500, 1000, and 2000 ms. Categorical predictors (group, ISI, and phase) were used to predict accuracy and variability using a linear mixed model. Accuracy was defined as the relative error of a tap, and variability as the deviation of the participant’s tap from group predicted relative error. Our primary finding is that the treated PD group (PD patients “on” and “off” dopaminergic therapy) showed a significantly different pattern of accuracy compared to the de novo group and the healthy controls at the 250-ms interval. At this interval, the treated PD patients performed “ahead” of the beat whilst the other groups performed “behind” the beat. We speculate that this “hastening” relates to the clinical phenomenon of motor festination. Across all groups, variability was smallest for both phases at the 500-ms interval, suggesting an innate preference for finger tapping within this range. Tapping variability for the two phases became increasingly divergent at the longer intervals, with worse performance in the continuation phase. The data suggest that patients with PD can be best discriminated from healthy controls on measures of motor timing accuracy, rather than variability

    Synchronization of a WDM Packet-Switched Slotted Ring

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    In this paper, we present two different strategies of slot synchronization in wavelength-division-multiplexing (WDM) packet-switched slotted-ring networks. Emphasis is given to the architecture behind the WDM Optical Network Demonstrator over Rings (WONDER) project, which is based on tunable transmitters and fixed receivers. The WONDER experimental prototype is currently being developed at the laboratories of Politecnico di Torino. In the former strategy, a slotsynchronization signal is transmitted by the master station on a dedicated control wavelength; in the latter, slave nodes achieve slot synchronization aligning on data packets that are received from the master. The performance of both synchronization strategies, particularly in terms of packet-collision probability, was evaluated by simulation. The technique based on transmitting a timing signal on a dedicated control wavelength achieves better performance, although it is more expensive due to the need for an additional wavelength. However, the technique based on aligning data packets that are received from the master, despite attaining lower timing stability, still deserves further study, particularly if limiting the number of wavelengths and receivers is a major requirement. Some experimental results, which were measured on the WONDER prototype, are also shown. Measurement results, together with theoretical findings, demonstrate the good synchronization performance of the prototype

    Symbol Synchronization for SDR Using a Polyphase Filterbank Based on an FPGA

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    This paper is devoted to the proposal of a highly efficient symbol synchronization subsystem for Software Defined Radio. The proposed feedback phase-locked loop timing synchronizer is suitable for parallel implementation on an FPGA. The polyphase FIR filter simultaneously performs matched-filtering and arbitrary interpolation between acquired samples. Determination of the proper sampling instant is achieved by selecting a suitable polyphase filterbank using a derived index. This index is determined based on the output either the Zero-Crossing or Gardner Timing Error Detector. The paper will extensively focus on simulation of the proposed synchronization system. On the basis of this simulation, a complete, fully pipelined VHDL description model is created. This model is composed of a fully parallel polyphase filterbank based on distributed arithmetic, timing error detector and interpolation control block. Finally, RTL synthesis on an Altera Cyclone IV FPGA is presented and resource utilization in comparison with a conventional model is analyzed

    Desynchronization: Synthesis of asynchronous circuits from synchronous specifications

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    Asynchronous implementation techniques, which measure logic delays at run time and activate registers accordingly, are inherently more robust than their synchronous counterparts, which estimate worst-case delays at design time, and constrain the clock cycle accordingly. De-synchronization is a new paradigm to automate the design of asynchronous circuits from synchronous specifications, thus permitting widespread adoption of asynchronicity, without requiring special design skills or tools. In this paper, we first of all study different protocols for de-synchronization and formally prove their correctness, using techniques originally developed for distributed deployment of synchronous language specifications. We also provide a taxonomy of existing protocols for asynchronous latch controllers, covering in particular the four-phase handshake protocols devised in the literature for micro-pipelines. We then propose a new controller which exhibits provably maximal concurrency, and analyze the performance of desynchronized circuits with respect to the original synchronous optimized implementation. We finally prove the feasibility and effectiveness of our approach, by showing its application to a set of real designs, including a complete implementation of the DLX microprocessor architectur

    Attosecond Precision Multi-km Laser-Microwave Network

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    Synchronous laser-microwave networks delivering attosecond timing precision are highly desirable in many advanced applications, such as geodesy, very-long-baseline interferometry, high-precision navigation and multi-telescope arrays. In particular, rapidly expanding photon science facilities like X-ray free-electron lasers and intense laser beamlines require system-wide attosecond-level synchronization of dozens of optical and microwave signals up to kilometer distances. Once equipped with such precision, these facilities will initiate radically new science by shedding light on molecular and atomic processes happening on the attosecond timescale, such as intramolecular charge transfer, Auger processes and their impact on X-ray imaging. Here, we present for the first time a complete synchronous laser-microwave network with attosecond precision, which is achieved through new metrological devices and careful balancing of fiber nonlinearities and fundamental noise contributions. We demonstrate timing stabilization of a 4.7-km fiber network and remote optical-optical synchronization across a 3.5-km fiber link with an overall timing jitter of 580 and 680 attoseconds RMS, respectively, for over 40 hours. Ultimately we realize a complete laser-microwave network with 950-attosecond timing jitter for 18 hours. This work can enable next-generation attosecond photon-science facilities to revolutionize many research fields from structural biology to material science and chemistry to fundamental physics.Comment: 42 pages, 13 figure

    Software Defined Radio Implementation of Carrier and Timing Synchronization for Distributed Arrays

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    The communication range of wireless networks can be greatly improved by using distributed beamforming from a set of independent radio nodes. One of the key challenges in establishing a beamformed communication link from separate radios is achieving carrier frequency and sample timing synchronization. This paper describes an implementation that addresses both carrier frequency and sample timing synchronization simultaneously using RF signaling between designated master and slave nodes. By using a pilot signal transmitted by the master node, each slave estimates and tracks the frequency and timing offset and digitally compensates for them. A real-time implementation of the proposed system was developed in GNU Radio and tested with Ettus USRP N210 software defined radios. The measurements show that the distributed array can reach a residual frequency error of 5 Hz and a residual timing offset of 1/16 the sample duration for 70 percent of the time. This performance enables distributed beamforming for range extension applications.Comment: Submitted to 2019 IEEE Aerospace Conferenc
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