Interchange of electronic design through VHDL and EIS

The need for both robust and unambiguous electronic designs is a direct requirement of the astonishing growth in design and manufacturing capability during recent years. In order to manage the plethora of designs, and have the design data both interchangeable and interoperable, the Very High Speed Integrated Circuits (VHSIC) program is developing two major standards for the electronic design community. The VHSIC Hardware Description Language (VHDL) is designed to be the lingua franca for transmission of design data between designers and their environments. The Engineering Information System (EIS) is designed to ease the integration of data betweeen diverse design automation systems. This paper describes the rationale for the necessity for these two standards and how they provide a synergistic expressive capability across the macrocosm of design environments

Simulation and BIM in building design, commissioning and operation: a comparison with the microelectronics industry

Analogy between the Microelectronics and Building industries is explored with the focus on design, commissioning and operation processes. Some issues found in the realisation of low energy buildings are highlighted and techniques gleaned from microelectronics proposed as possible solutions. Opportunities identified include: adoption of a more integrated process, use of standard cells, inclusion of controls and operational code in the design, generation of building commissioning tests from simulation, generation of building operational control code (including self-test) from simulation, inclusion of variation and uncertainties in the design process, use of quality processes such as indices to represent design robustness and formal continuous improvement methods. The possible integration of these techniques within a building information model (BIM) flow is discussed and some examples of enabling technologies given

Advanced information processing system: The Army fault tolerant architecture conceptual study. Volume 1: Army fault tolerant architecture overview

Digital computing systems needed for Army programs such as the Computer-Aided Low Altitude Helicopter Flight Program and the Armored Systems Modernization (ASM) vehicles may be characterized by high computational throughput and input/output bandwidth, hard real-time response, high reliability and availability, and maintainability, testability, and producibility requirements. In addition, such a system should be affordable to produce, procure, maintain, and upgrade. To address these needs, the Army Fault Tolerant Architecture (AFTA) is being designed and constructed under a three-year program comprised of a conceptual study, detailed design and fabrication, and demonstration and validation phases. Described here are the results of the conceptual study phase of the AFTA development. Given here is an introduction to the AFTA program, its objectives, and key elements of its technical approach. A format is designed for representing mission requirements in a manner suitable for first order AFTA sizing and analysis, followed by a discussion of the current state of mission requirements acquisition for the targeted Army missions. An overview is given of AFTA's architectural theory of operation

BDEF : the behavioral design data exchange format

BDDB is a Behavioral Design Data Base that manages the design data produced and consumed by different behavioral synthesis tools. These different design tools retrieve design data from BDDB, manipulate the data, and then store the results back into the data base. BDDB thus needs to address the following two issues: (1) a design data exchange approach and (2) customized design data interfaces. To address the first issue, we have developed a textual description format for describing design data objects and relationships. This language, referred to as the Behavioral Design Data Exchange Format (BDEF), is used as common format for exchanging design data between BDDB and the design tools in the behavioral synthesis environment. To address the second issue, we have developed a behavioral object type description language (generally referred to as schema definition language) for describing the global data structures required by design tools as well as the desired design subviews of this global BDDB design information. One design view class, namely, BDEF, is the topic of this report.In this report we give a formal definition of the BDEF format. Then we describe a comprehensive example of applying BDEF to the behavioral synthesis domain. That is, we present the complete BDEF syntax for the Extended Control/Data Flow Graph Model (ECDFG), which is the design representation model used by most behavioral synthesis tools in the UCI CADLAB synthesis system. We also present several example descriptions of designs using this ECDFG model. A parser/graph compiler from BDEF into the generalized ECDFG design representation as well as a BDEF generator from the ECDFG data structures into the BDEF format have been implemented

FPGA fuzzy controller design for magnetic ball levitation

this paper presents a fuzzy controller design for nonlinear system using FPGA. A magnetic levitation system is considered as a case study and the fuzzy controller is designed to keep a magnetic object suspended in the air counteracting the weight of the object. Fuzzy controller will be implemented using FPGA chip. The design will use a high-level programming language HDL for implementing the fuzzy logic controller using the Xfuzzy tools to implement the fuzzy logic controller into HDL code. This paper, advocates a novel approach to implement the fuzzy logic controller for magnetic ball levitation system by using FPGA

Live Access Control Policy Error Detection Through Hardware

Access Control (AC) is a widely used security measure designed to protect resources and infrastructure in an information system. The integrity of the AC policy is crucial to the protection of the system. Errors within an AC policy may cause many vulnerabilities such as information leaks, information loss, and malicious activities. Thus, such errors must be detected and promptly fixed. However, current AC error detection models do not allow for real-time error detection, nor do they provide the source of errors. This thesis presents a live error detection model called LogicDetect which utilizes emulated Boolean digital logic circuits to provide continual feedback and error source identification. The outcome is a new error detection model allowing policy creators to identify the source of errors quickly and accurately at any stage during policy creation

Static Analysis of Circuits for Security

The purpose of the present work is to define a methodology to analyze a system description given in VHDL code and test its security properties. In particular the analysis is aimed at ensuring that a malicious user cannot make a circuit output the secret data it contains

FPGA design methodology for industrial control systems—a review

This paper reviews the state of the art of fieldprogrammable gate array (FPGA) design methodologies with a focus on industrial control system applications. This paper starts with an overview of FPGA technology development, followed by a presentation of design methodologies, development tools and relevant CAD environments, including the use of portable hardware description languages and system level programming/design tools. They enable a holistic functional approach with the major advantage of setting up a unique modeling and evaluation environment for complete industrial electronics systems. Three main design rules are then presented. These are algorithm refinement, modularity, and systematic search for the best compromise between the control performance and the architectural constraints. An overview of contributions and limits of FPGAs is also given, followed by a short survey of FPGA-based intelligent controllers for modern industrial systems. Finally, two complete and timely case studies are presented to illustrate the benefits of an FPGA implementation when using the proposed system modeling and design methodology. These consist of the direct torque control for induction motor drives and the control of a diesel-driven synchronous stand-alone generator with the help of fuzzy logic