Models of computation: A numeric analysis and performance evaluation

This research seeks to better understand what drives performance in computation. To develop this understanding the researcher investigates the literature on computational performance within the classical and quantum paradigm for both binary and multi-value logic. Based on the findings of the literature the researcher evaluates through an experiment of addition what drives performance and how performance can be improved. For the evaluation of this research, a realist research paradigm employs two research methods. The first is an automaton model of computation to model each of the computing paradigms and computational logic. The second is computational complexity theory for measuring the performance of addition. Through this evaluation the researcher seeks to gain a better understanding of what drives computational performance and how addition can be performed more efficiently. The results of the research lead the researcher to conclude that modernisation of machinery caused the birth start of automated computing and the binary number system in computers. As this research indicated that computation through increasing the radix can improve performance of computation for addition. Based on reported findings in the science of quantum mechanics research, it would be possible to implement a model of computation with increased radix. Through embracing state discrimination/ distinguishability this research calls to review the current quantum computing paradigm based on state duality

Quaternary circuits : adder and multiplier

Orientador: Alberto Martins JorgeDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de ComputaçãoResumo: Os circuitos quaternários são uma alternativa para o processamento das informações, que, atualmente, acontece de forma binária. Ainda em fase de definições, a lógica multivalores mostra-se como um campo de pesquisas que pode auxiliar a busca pelo incremento de desempenho e redução de área de ocupação dos transistores de um circuito integrado. A lógica multi-valores utilizando-se de quatro dígitos na representação das informações é a lógica quaternária. Neste trabalho são propostos alguns blocos básicos de circuitos eletrônicos quaternários que, progressivamente, são aglutinados formando blocos mais complexos para finalmente construir-se um circuito meio-somador, um somador completo e um multiplicador quaternários. As montagens são feitas e testadas em simulador de circuitos eletrônicos e operam em modo corrente com transistores bipolares NPN e PNPAbstract: The quaternary circuits are an alternative to data processing that, nowadays, occurs in a binary way. Still in a definition stage, the multiple-valued logic seems to be a research area to aid the increase of performance and reduction of area of the transistors inside an integrated circuit. The multiple-valued logic using four digits to represent the data is called quaternary logic. In this work are proposed some basic blocks of electronic quaternary circuit which are progressively joined to become more complex blocks and finally a half-adder, a full adder and a multiplier. The configurations are done and evaluated in a circuit simulator operating in a current-mode with bipolar NPN and PNP transistorsMestradoEletrônica, Microeletrônica e OptoeletrônicaMestre em Engenharia Elétric