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3 research outputs found

A reconfigurable parallel signature analyzer for concurrent error correction in DRAM

Author: J.A. Abraham
J.H. Patel
P. Mazumder
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date
Field of study

Built-in self test for memory systems /

Author: Lerner Steven A.
Publication venue: Lehigh Preserve
Publication date
Field of study

Lehigh University: Lehigh Preserve

Parallel Testing for Pattern Sensitive Faults in Semiconductor Random Access Memory

Author: Mazumder Pinaki
Patel Janak H.
Publication venue: Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Publication date: 01/08/1986
Field of study

Coordinated Science Laboratory was formerly known as Control Systems LaboratorySemiconductor Research Corporation / SRC RSCH 84-06-049-

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