Flexible Receivers in CMOS for Wireless Communication

Consumers are pushing for higher data rates to support more services that are introduced in mobile applications. As an example, a few years ago video-on-demand was only accessed through landlines, but today wireless devices are frequently used to stream video. To support this, more flexible network solutions have merged in 4G, introducing new technical problems to the mobile terminal. New techniques are thus needed, and this dissertation explores five different ideas for receiver front-ends, that are cost-efficient and flexible both in performance and operating frequency. All ideas have been implemented in chips fabricated in 65 nm CMOS technology and verified by measurements. Paper I explores a voltage-mode receiver front-end where sub-threshold positive feedback transistors are introduced to increase the linearity in combination with a bootstrapped passive mixer. Paper II builds on the idea of 8-phase harmonic rejection, but simplifies it to a 6-phase solution that can reject noise and interferers at the 3rd order harmonic of the local oscillator frequency. This provides a good trade-off between the traditional quadrature mixer and the 8- phase harmonic rejection mixer. Furthermore, a very compact inductor-less low noise amplifier is introduced. Paper III investigates the use of global negative feedback in a receiver front-end, and also introduces an auxiliary path that can cancel noise from the main path. In paper IV, another global feedback based receiver front-end is designed, but with positive feedback instead of negative. By introducing global positive feedback, the resistance of the transistors in a passive mixer-first receiver front-end can be reduced to achieve a lower noise figure, while still maintaining input matching. Finally, paper V introduces a full receiver chain with a single-ended to differential LNA, current-mode downconversion mixers, and a baseband circuity that merges the functionalities of the transimpedance amplifier, channel-select filter, and analog-to-digital converter into one single power-efficient block

Fully-integrated mm-Wave Full-duplexing and MIMO Multi-beamforming Receiver Techniques for 5G and Beyond

In recent years, the research community's interest in fully integrated mm-Wave wireless communication systems has increased significantly. With the standards for 5G NR now in place, the focus has shifted to actual deployment. Mm-Wave systems provide wider bandwidths, higher capacity, and lower latency than existing systems such as 4G. Higher path loss and shadowing, however, limit the network coverage at mm-Wave frequencies. The possibility of beamforming due to compact antenna size at mm-Wave and range-extending repeaters help mitigate challenges arising from path loss and relax link budget requirements. In the first part of the thesis, fully integrated scalable MIMO multi-beamforming phased-array to enable unit-tile based densely packed (lambda=2) large scale phased-arrays is demonstrated. Large scale arrays enhance Signal to Noise Ratio (SNR) and/or Effective Isotropically Radiated Power (EIRP) and help meet link budget. In the second part, mm-Wave Full-duplex (FD) receiver (RX) to implement Integrated Access and Backhaul (IAB) and repeaters in a spectrum efficient way is demonstrated. Dense deployment of IAB and repeaters enhances link robustness and range of connectivity. Two Integrated Chips (ICs) are fabricated and measured for demonstration. In the first IC, a 4-element MIMO RX array with multi-beamforming and simplified single wire intermediate frequency (IF) IO is presented. The evolution of mm-wave phased array receivers to MIMO RX promises multi-beamforming and improved capacity. Digital Beamforming (DBF) provides the highest flexibility for multibeamforming. However, it suffers from # of ADCs scaling with the # of elements and absence of spatial filtering prior to the ADCs. Mm-Wave MIMO arrays must also address the challenge of increased IO routing while supporting dense ll-factors with =2 antenna spacing. In this work, a MIMO multi-beamforming RX array architecture with simultaneous spatial filtering and single wire Frequency-domain Multiplexing (FDM) for 5G and beyond is presented. The proposed system preserves full MIMO field-of-view while ensuring a single IF interface. A 28 GHz 4-element RX prototype demonstrates the proposed functionality in 65-nm CMOS. The IC occupies only 3.4mm x 3.1mm for a four-element MIMO 28 GHz array and can form four independent beams with > 400MHz 3 dB BW and FDM on to a single IF interface. Mm-wave MIMO operation is demonstrated by concurrent reception of two wireless 28 GHz beams at 400 Mb/s (100 Msps, 16QAM) data rate. In the second IC, a 26-GHz fully integrated In-band Full-duplex (IBFD) Circulator receiver, which employs passive and active Self-interference Cancellation (SIC) techniques in the mm-Wave domain is presented. Coverage of wireless networks at mm-Wave frequencies can be enhanced by deploying a large number of base stations economically using wireless backhauling. Integrated access and backhaul nodes with spectrum reuse is an efficient way of wireless backhauling. To retain the channel capacity, IAB needs to be implemented using FD schemes that suffers from a strong Transmitter (TX) to RX leakage. This SI leakage can significantly impact the receiver sensitivity and increase the baseband/ADC dynamic range requirements. Canceling SI at mm-Wave applications is challenging given the high frequency of operation, wide bandwidths, and antenna (ANT) impedance sensitivity to the surroundings. Proposed mm-Wave RX with a shared ANT interface based on a Circulator with active SI cancelers provide ~53 dB SIC over 400MHz and ~40 dB SIC over 400MHz to meet the link budget requirements. Proposed architecture achieves SIC by (i) introducing a shared ANT interface based on a hybrid-coupler and a Non-reciprocal Transmission Line (NTL) that provides wideband SIC and additionally creating a SI replica (ii) subsequent active cancellation using SI replica along with variable gain and phase shifters to accommodate SI channel variations. Proposed 26-GHz RX consumes only ~111mW power. The system is implemented in 45nm SOI CMOS and has an active area of 4.54mm². Stand-alone RX NF is ~5.8 dB, and TX to ANT Insertion Loss (IL) is ~3.1 dB. Over-the-Air (OTA) measurements with modulated TX (128 QAM 2.1 Gb/s) and RX (128 QAM 4.2 Gb/s) signals show an EVM of 3.3% when PTX = PRX

RF system model for In-band full duplex communications

Abstract. In recent years by increasing the demands for communication services various technologies are examined in order to improve the throughput and spectrum efficiency of the wireless communication systems. For improving the performance a communication network, system deficiencies such as transmitter and receiver impairments need to be removed or compensated. One way to improve the network efficiency is to employ full duplex technology. Full duplex technology doubles the network capacity compared to the case when typical frequency division duplexing (FDD) or time division duplexing (TDD) are employed in a transceiver design. Although full duplex (FD) technology has enhanced the performance of the radio communication devices, the main challenge in full duplex communication is the leaking self-interference signal from the transmitter to the receiver. Different methods are employed to suppress the self-interference signal in digital and analog domains which are categorized as passive or active cancellations. These techniques are discussed in this thesis in order to understand from which point in the propagation path, the required signal for cancellation can be taken and how those techniques are employed in digital and analog domains. For having a good self-interference cancellation (SIC) both analog and digital cancellation techniques are needed since typical digital suppression method is low complex and somewhat limited. In this thesis, first we start with discussing about the full duplex technology and the reason why it has become popular in recent years and later full duplex deficiencies are examined. In the following chapters different cancellation methods are introduced and some results are provided in Chapter 5

Integrated Self-Interference Cancellation for Full-Duplex and Frequency-Division Duplexing Wireless Communication Systems

From wirelessly connected robots to car-to-car communications, and to smart cities, almost every aspect of our lives will benefit from future wireless communications. While promise an exciting future world, next-generation wireless communications impose requirements on the data rate, spectral efficiency, and latency (among others) that are higher than those for today's systems by several orders of magnitude. Full-duplex wireless, an emergent wireless communications paradigm, breaks the long-held assumption that it is impossible for a wireless device to transmit and receive simultaneously at the same frequency, and has the potential to immediately double network capacity at the physical (PHY) layer and offers many other benefits (such as reduced latency) at the higher layers. Recently, discrete-component-based demonstrations have established the feasibility of full-duplex wireless. However, the realization of integrated full duplex radios, compact radios that can fit into smartphones, is fraught with fundamental challenges. In addition, to unleash the full potential of full-duplex communication, a careful redesign of the PHY layer and the medium access control (MAC) layer using a cross-layer approach is required. The biggest challenge associated with full duplex wireless is the tremendous amount of transmitter self-interference right on top of the desired signal. In this dissertation, new self-interference-cancellation approaches at both system and circuit levels are presented, contributing towards the realization of full-duplex radios using integrated circuit technology. Specifically, these new approaches involve elimination of the noise and distortion of the cancellation circuitry, enhancing the integrated cancellation bandwidth, and performing joint radio frequency, analog, and digital cancellation to achieve cancellation with nearly one part-per-billion accuracy. In collaboration with researchers at higher layers of the stack, a cross-layer approach has been used in our full-duplex research and has allowed us to derive power allocation algorithms and to characterize rate-gain improvements for full-duplex wireless networks. To enable experimental characterization of full-duplex MAC layer algorithms, a cross-layered software-defined full-duplex radio testbed has been developed. In collaboration with researchers from the field of micro-electro-mechanical systems, we demonstrate a multi-band frequency-division duplexing system using a cavity-filter-based tunable duplexer and our integrated widely-tunable self-interference-cancelling receiver

High Performance Local Oscillator Design for Next Generation Wireless Communication

Local Oscillator (LO) is an essential building block in modern wireless radios. In modern wireless radios, LO often serves as a reference of the carrier signal to modulate or demod- ulate the outgoing or incoming data. The LO signal should be a clean and stable source, such that the frequency or timing information of the carrier reference can be well-defined. However, as radio architecture evolves, the importance of LO path design has become much more important than before. Of late, many radio architecture innovations have exploited sophisticated LO generation schemes to meet the ever-increasing demands of wireless radio performances. The focus of this thesis is to address challenges in the LO path design for next-generation high performance wireless radios. These challenges include (1) Congested spectrum at low radio frequency (RF) below 5GHz (2) Continuing miniaturization of integrated wireless radio, and (3) Fiber-fast (>10Gb/s) mm-wave wireless communication. The thesis begins with a brief introduction of the aforementioned challenges followed by a discussion of the opportunities projected to overcome these challenges. To address the challenge of congested spectrum at frequency below 5GHz, novel ra- dio architectures such as cognitive radio, software-defined radio, and full-duplex radio have drawn significant research interest. Cognitive radio is a radio architecture that opportunisti- cally utilize the unused spectrum in an environment to maximize spectrum usage efficiency. Energy-efficient spectrum sensing is the key to implementing cognitive radio. To enable energy-efficient spectrum sensing, a fast-hopping frequency synthesizer is an essential build- ing block to swiftly sweep the carrier frequency of the radio across the available spectrum. Chapter 2 of this thesis further highlights the challenges and trade-offs of the current LO gen- eration scheme for possible use in sweeping LO-based spectrum analysis. It follows by intro- duction of the proposed fast-hopping LO architecture, its implementation and measurement results of the validated prototype. Chapter 3 proposes an embedded phase-shifting LO-path design for wideband RF self-interference cancellation for full-duplex radio. It demonstrates a synergistic design between the LO path and signal to perform self-interference cancellation. To address the challenge of continuing miniaturization of integrated wireless radio, ring oscillator-based frequency synthesizer is an attractive candidate due to its compactness. Chapter 4 discussed the difficulty associated with implementing a Phase-Locked Loop (PLL) with ultra-small form-factor. It further proposes the concept sub-sampling PLL with time- based loop filter to address these challenges. A 65nm CMOS prototype and its measurement result are presented for validation of the concept. In shifting from RF to mm-wave frequencies, the performance of wireless communication links is boosted by significant bandwidth and data-rate expansion. However, the demand for data-rate improvement is out-pacing the innovation of radio architectures. A >10Gb/s mm-wave wireless communication at 60GHz is required by emerging applications such as virtual-reality (VR) headsets, inter-rack data transmission at data center, and Ultra-High- Definition (UHD) TV home entertainment systems. Channel-bonding is considered to be a promising technique for achieving >10Gb/s wireless communication at 60GHz. Chapter 5 discusses the fundamental radio implementation challenges associated with channel-bonding for 60GHz wireless communication and the pros and cons of prior arts that attempted to address these challenges. It is followed by a discussion of the proposed 60GHz channel- bonding receiver, which utilizes only a single PLL and enables both contiguous and non- contiguous channel-bonding schemes. Finally, Chapter 6 presents the conclusion of this thesis