5 research outputs found

    An Event-Based Synchronization Framework for Controller Hardware-in-the-loop Simulation of Electric Railway Power Electronics Systems

    Full text link
    The Controller Hardware_in_the_loop (CHIL) simulation is gaining popularity as a cost_effective, efficient, and reliable tool in the design and development process of fast_growing electrified transportation power converters. However, it is challenging to implement the conventional CHIL simulations on the railway power converters with complex topologies and high switching frequencies due to strict real_time constraints. Therefore, this paper proposes an event-based synchronization CHIL (ES_CHIL) framework for high_fidelity simulation of these electrified railway power converters. Different from conventional CHIL simulations synchronized through the time axis, the ES_CHIL framework is synchronized through the event axis. Therefore, it can ease the real_time constraint and broaden the upper bound on the system size and switching frequency. Besides, models and algorithms with higher accuracy, such as the diode model with natural commutation processes, can be used in the ES-CHIL framework. The proposed framework is validated for a 350 kW wireless power transformer system containing 24 fully controlled devices and 36 diodes by comparing it with Simulink and physical experiments. This research improves the fidelity and application range of the power converters CHIL simulation. Thus, it helps to accelerate the prototype design and performance evaluation process for electrified railways and other applications with such complex converters

    Real-Time Hardware-In-the-Loop Testing of IEC 61850 GOOSE based Logically Selective Adaptive Protection of AC Microgrid

    Get PDF
    The real-time (RT) hardware-in-the-loop (HIL) simulation-based testing is getting popular for power systems and power electronics applications. The HIL testing provides the interactive environment between the actual power system components like control and protection devices and simulated power system networks including different communication protocols. Therefore, the results of the RT simulation and HIL testing before the actual implementation in the field are generally more acceptable than offline simulations. This paper reviews the HIL testing methods and applications in the recent literature and presents a step-by-step documentation of a new HIL testing setup for a specific case study. The case study evaluates improved version of previously proposed communication-dependent logically selective adaptive protection algorithm of AC microgrids using the real-time HIL testing of IEC 61850 generic object-oriented substation event (GOOSE) protocol. The RT model of AC microgrid including the converter-based distributed energy resources and battery storage along with IEC 61850 GOOSE protocol implementation is created in MATLAB/Simulink and RT-LAB software using OPAL-RT simulator platform. The Ethernet switch acts as IEC 61850 station bus for exchanging GOOSE Boolean signals between the RT target and the actual digital relay. The evaluation of the round-trip delay using the RT simulation has been performed. It is found that the whole process of fault detection, isolation and adaptive setting using Ethernet communication is possible within the standard low voltage ride through curve maintaining the seamless transition to the islanded mode. The signal monitoring inside the relay is suggested to avoid false tripping of the relay.©2021 Institute of Electrical and Electronics Engineers. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/This work was mainly carried out in the SolarX research project funded by the Business Finland under Grant No. 6844/31/2018. Some part of this work was carried out during the VINPOWER research project funded by the European Regional Development Fund (ERDF), Project No. A73094. The financial support provided through these projects is greatly acknowledged.fi=vertaisarvioitu|en=peerReviewed

    A Matrix-Inversion Technique for FPGA-Based Real-Time EMT Simulation of Power Converters

    No full text

    FPGA-based EMT simulation

    Get PDF
    With the massive integration of renewable energy and power electronics, the structure of modern power system becomes increasingly complex. This is a great challenge for the secure and reliable operation of large power systems. It has been recognised that Electromagnetic Transients (EMT) simulations play an important role in analysing large power system operation, control and protection. Hence it is desirable to investigate faster and more efficient simulation methods for large-scale power systems. The existing off-line software packages, such as MATLAB and PSCAD, are time-consuming to simulate EMTs of large scale power systems. There is a growing demand to develop cheaper and faster EMT simulation technologies/techniques. The rapid evolution of computing technologies makes it possible to enhance EMT simulations in real-time domain. With fast calculation speed, configurable resources and programmable structure, Field-Programmable Gate Array (FPGA) is a powerful platform for EMT simulation. Therefore, this thesis aims to propose high-performance FPGA-based EMT simulation models and algorithms with improved accuracy, speed, and efficiency. First, Single-Precision, Double-Precision and Mixed-Precision algorithms are proposed and compared to enhance numerical accuracy for the first time. Existing research publications only consider Single-Precision as default option and ignore possible numerical phase shift in FPGA. As a basis for EMT simulation, a library of fundamental power system components is built up, including linear and nonlinear components. Single-Precision and Double-Precision algorithm are using the same precision for all components. Consider component dynamics, the key of Mixed-Precision is simulating linear and non-linear component using Single-Precision and Double-Precision respectively to eliminate phase shift. Hardware structure is also optimized to make these different precision algorithms achievable on single FPGA board. By comparing with the same referenced models in MATLAB, three algorithms are tested via case studies, including linear components, rotating non-linear components on smaller and larger systems. The adaptability of these algorithms is verified effectively in terms of accuracy, resource utilization, and timing. Second, four initialization methods are developed to minimize accumulated error for FPGA-based EMT simulation for the first time. Most researches from non-initialized time point, which will increase random error. To simulate from initial steady state, fast and reliable initialization are worth to be investigated. For necessary information, key issues for FPGA-based initialization are discussed first, including initialization model type, memory unit and sequence. Both VHDL file (.VHD) and Coefficient (.COE) file allows defining initial data. To maximize flexibility, four initialization methods, including Method 1 (physical interface), Method 2 (signal declaration), Method 3 (signal assignment) and Method 4 (COE) file are proposed and provided with detailed programming codes. For ahead-of-time evaluation, routing and timing performances are compared between these four methods, and Method 4 is the simplest method. The implementation structure and algorithm of Method 4 are developed to allow flexible data transfer between different platforms. For flexible scalability, device-level and system-level case studies are both provided to compare practical performance of Method 1-4. Third, a generic MATLAB-to-FPGA toolbox is developed for users to simplify hardware design. This is motivated by FPGA programming is complex and using FPGA to model EMT is more time-consuming for beginners. Without any EMT functionalities, existing translation toolboxes are focused on direct translation from other language to VHDL/Verilog. Therefore, the development toolbox can accelerate beginners to familiarize FPGA-based EMT. In a user-friendly environment, development framework, design features and requirements are developed for fast processing. For general processing form, data format, structure and partition are developed using intelligent MATLAB built-in functions. To support low-level calculations, translation and resource reutilization for using IP CORES are presented. To integrate and control low-level calculations, high-level main controllers using FSM (Finite State Machine) is setting up sequencers for pipelined and non-pipelined stage. A 39-bus network case study is provided to verify the effectiveness of proposed MATLAB-to-FPGA toolbox. To support high-frequency switching, power electronic devices and control systems are also developed for FPGA-based EMT simulation. Existing research focuses on using multi-FPGA to simulate HVDC-MMC system, this research aims at implementing whole HVDC-MMC system operation and control on single FPGA platform. This can help reduce FPGA area cost and improve resource utilization efficiency. As a supplement to existing power system components, power electronic devices, such as IGBT and MMC (Modular Multi-level Converter), are built up in discrete-time mathematical models. Based on trapezoidal rule, the aggregate model of MMC is derived to use only one equivalent module to represent all modules, regardless of arbitrary modules. Control system, such as PWM control and current control loop, is also modelled and simplified to be more suitable for hardware implementation. Optimized strategies, such as shift memory and interpolation, are also proposed to get lower resource utilization and faster calculation speed in FPGA. With these strategies, PWM control block and HVDC-MMC case studies can both be successfully implemented on single FPGA board with high-performance accuracy and resource utilization
    corecore