A Direct Carrier I/Q Modulator for High-Speed Communication at D-Band Using 130 nm SiGe BiCMOS Technology

This paper presents a 110-170 GHz direct conversion I/Q modulator realized in 130 nm SiGe BiCMOS technology with ft/fmax values of 250 GHz/ 370 GHz. The design is based on double-balanced Gilbert mixer cells with on-chip quadrature LO phase shifter and RF balun. In single-sideband operation, the modulator exhibits up to 9.5 dB conversion gain and has measured 3 dB IF bandwidth of 12 GHz. The measured image rejection ratio and LO to RF isolation are as high as 20 dB and 31 dB respectively. Meas-ured input P1dB is -17 dBm at 127 GHz output. The DC power con-sumption is 53 mW. The active chip area is 620 μm× 480 μm in-cluding the RF and LO baluns. The circuit is capable of transmit-ting more than 12 Gbit/s QPSK signal

Millimeter-wave Communication and Radar Sensing — Opportunities, Challenges, and Solutions

With the development of communication and radar sensing technology, people are able to seek for a more convenient life and better experiences. The fifth generation (5G) mobile network provides high speed communication and internet services with a data rate up to several gigabit per second (Gbps). In addition, 5G offers great opportunities of emerging applications, for example, manufacture automation with the help of precise wireless sensing. For future communication and sensing systems, increasing capacity and accuracy is desired, which can be realized at millimeter-wave spectrum from 30 GHz to 300 GHz with several tens of GHz available bandwidth. Wavelength reduces at higher frequency, this implies more compact transceivers and antennas, and high sensing accuracy and imaging resolution. Challenges arise with these application opportunities when it comes to realizing prototype or demonstrators in practice. This thesis proposes some of the solutions addressing such challenges in a laboratory environment.High data rate millimeter-wave transmission experiments have been demonstrated with the help of advanced instrumentations. These demonstrations show the potential of transceiver chipsets. On the other hand, the real-time communication demonstrations are limited to either low modulation order signals or low symbol rate transmissions. The reason for that is the lack of commercially available high-speed analog-to-digital converters (ADCs); therefore, conventional digital synchronization methods are difficult to implement in real-time systems at very high data rates. In this thesis, two synchronous baseband receivers are proposed with carrier recovery subsystems which only require low-speed ADCs [A][B].Besides synchronization, high-frequency signal generation is also a challenge in millimeter-wave communications. The frequency divider is a critical component of a millimeter-wave frequency synthesizer. Having both wide locking range and high working frequencies is a challenge. In this thesis, a tunable delay gated ring oscillator topology is proposed for dual-mode operation and bandwidth extension [C]. Millimeter-wave radar offers advantages for high accuracy sensing. Traditional millimeter-wave radar with frequency-modulated continuous-wave (FMCW), or continuous-wave (CW), all have their disadvantages. Typically, the FMCW radar cannot share the spectrum with other FMCW radars.\ua0 With limited bandwidth, the number of FMCW radars that could coexist in the same area is limited. CW radars have a limited ambiguous distance of a wavelength. In this thesis, a phase-modulated radar with micrometer accuracy is presented [D]. It is applicable in a multi-radar scenario without occupying more bandwidth, and its ambiguous distance is also much larger than the CW radar. Orthogonal frequency-division multiplexing (OFDM) radar has similar properties. However, its traditional fast calculation method, fast Fourier transform (FFT), limits its measurement accuracy. In this thesis, an accuracy enhancement technique is introduced to increase the measurement accuracy up to the micrometer level [E]

Millimeter-Wave and Terahertz Transceivers in SiGe BiCMOS Technologies

This invited paper reviews the progress of silicon–germanium (SiGe) bipolar-complementary metal–oxide–semiconductor (BiCMOS) technology-based integrated circuits (ICs) during the last two decades. Focus is set on various transceiver (TRX) realizations in the millimeter-wave range from 60 GHz and at terahertz (THz) frequencies above 300 GHz. This article discusses the development of SiGe technologies and ICs with the latter focusing on the commercially most important applications of radar and beyond 5G wireless communications. A variety of examples ranging from 77-GHz automotive radar to THz sensing as well as the beginnings of 60-GHz wireless communication up to THz chipsets for 100-Gb/s data transmission are recapitulated. This article closes with an outlook on emerging fields of research for future advancement of SiGe TRX performance

A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method

This research looks into the design of an integrated in-phase/quadrature (I/Q) VCO operating at 5 GHz. The goal is to design a phase shifter that is implemented at the LO used for RF up conversion. The target application for the phase shifter is towards phased array antennas operating at 5 GHz. Instead of designing multiple VCOs that each deliver a variety of phases, two identical LC-VCOs are coupled together to oscillate at the same frequency and deliver four outputs that are 90 ° out of phase. By varying the amplitudes of the in-phase and quadrature signals independently using VGAs before adding them together, a resultant out-of-phase signal is obtained. A number of independently variable out-of-phase signals can be obtained from these 90 ° out-of-phase signals and this technique is better known as the vector sum method of phase shifting. Control signals to the inputs of the VGAs required to obtain 22.5 ° phase shifts were designed from simulations and are generated using 16-bit DACs. The design is implemented and manufactured using a 0.35 µm SiGe BiCMOS process and the complete prototype IC occupies an area of 2.65 × 2.65 mm2. The I/Q VCO with 360 ° variable phase outputs occupies 1.10 × 0.85 mm2 of chip area and the 16-bit DAC along with its decoding circuitry occupies 0.41 × 0.13 mm2 of chip area. The manufactured quadrature VCO was found to oscillate between 4.12 ~ 4.74 GHz and consumes 23.1 mW from a 3.3 V supply without its buffer circuitry. A maximum phase noise of -78.5 dBc / Hz at a 100 kHz offset and -108.17 dBc / Hz at a 1 MHz offset was measured and the minimum VCO figure of merit is 157.8 dBc / Hz. The output voltages of the 16 bit DAC are within 3.5 % of the design specifications. When the phase shifter is controlled by the 16 DAC signals, the maximum measured phase error of the phase shifter is lower than 10 %.Dissertation (MEng)--University of Pretoria, 2009.Electrical, Electronic and Computer Engineeringunrestricte

A 12GHz 30mW 130nm CMOS Rotary Travelling Wave Voltage Controlled Oscillator

This paper reports a 12GHz Rotary Travelling Wave (RTW) Voltage Controlled Oscillator designed in a 130nm CMOS technology. The phase noise and power consumption performances were compared with the literature and with telecommunication standards for broadcast satellite applications. The RTW VCO exhibits a -106dBc/Hz@1MHz and a 30mW power consumption with a sensibility of 400 MHz/V. Finally, requirements are given for a PLL implementation of the RTW VCO and simulated results are presented

Integrated Distributed Amplifiers for Ultra-Wideband BiCMOS Receivers Operating at Millimeter-Wave Frequencies

Millimetre-wave technology is used for applications such as telecommunications and imaging. For both applications, the bandwidth of existing systems has to be increased to support higher data rates and finer imaging resolutions. Millimetrewave circuits with very large bandwidths are developed in this thesis. The focus is put on amplifiers and the on-chip integration of the amplifiers with antennas. Circuit prototypes, fabricated in a commercially available 130nm Silicon-Germanium (SiGe) Bipolar Complementary Metal-Oxide-Semiconductor (BiCMOS) process, validated the developed techniques. Cutting-edge performances have been achieved in the field of distributed and resonant-matched amplifiers, as well as in that of the antenna-amplifier co-integration. Examples are as follows: - A novel cascode gain-cell with three transistors was conceived. By means of transconductance peaking towards high frequencies, the losses of the synthetic line can be compensated up to higher frequencies. The properties were analytically derived and explained. Experimental demonstration validated the technique by a Traveling-Wave Amplifier (TWA) able to produce 10 dB of gain over a frequency band of 170GHz.# - Two Cascaded Single-Stage Distributed Amplifiers (CSSDAs) have been demonstrated. The first CSSDA, optimized for low power consumption, requires less than 20mW to provide 10 dB of gain over a frequency band of 130 GHz. The second amplifier was designed for high-frequency operation and works up to 250 GHz leading to a record bandwidth for distributed amplifiers in SiGe technology. - The first complete CSSDA circuit analysis as function of all key parameters was presented. The typical degradation of the CSSDA output matching towards high frequencies was analytically quantified. A balanced architecture was then introduced to retain the frequency-response advantages of CSSDAs and yet ensure matching over the frequency band of interested. A circuit prototype validated experimentally the technique. - The first traveling-wave power combiner and divider capable of operation from the MHz range up to 200 GHz were demonstrated. The circuits improved the state of the art of the maximum frequency of operation and the bandwidth by a factor of five. - A resonant-matched balanced amplifier was demonstrated with a centre frequency of 185 GHz, 10 dB of gain and a 55GHz wide –3 dB-bandwidth. The power consumption of the amplifier is 16.8mW, one of the lowest for this circuit class, while the bandwidth is the broadest reported in literature for resonant-matched amplifiers in SiGe technology

0.42 THz Transmitter with Dielectric Resonator Array Antenna

Off chip antennas do not occupy the expensive die area, as there is no limitation on their building material, and can be built in any size and shape to match the system requirements, which are all in contrast to on-chip antenna solutions. However, integration of off-chip antennas with Monolithic-Microwave-Integrated Chips (MMIC) and designing a low loss signal transmission from the signal source inside the MMIC to the antenna module is a major challenge and trade off. High resistivity silicon (HRS), is a low cost and extremely low loss material at sub-THz. It has become a prevailing material in fabrication of passive components for THz applications. This work makes use of HRS to build an off-chip Dielectric Resonator Antenna Array Module (DRAAM) to realize a highly efficient transmitter at 420 GHz. This work proposes novel techniques and solutions for design and integration of DRRAM with MMIC as the signal source. A proposed scalable 4×4 antenna structure aligns DRRAM on top of MMIC within 2 μm accuracy through an effortless assembly procedure. DRAAM shows 15.8 dB broadside gain and 0.85 efficiency. DRAs in the DRAAM are differentially excited through aperture coupling. Differential excitation not only inherently provides a mechanism to deliver more power to the antenna, it also removes the additional loss of extra balluns when outputs are differential inside MMIC. In addition, this work proposes a technique to double the radiation power from each DRA. Same radiating mode at 0.42 THz inside every DRA is excited through two separate differential sources. This approach provides an almost loss-less power combining mechanism inside DRA. Two 140_GHz oscillators followed by triplers drive each DRA in the demonstrated 4×4 antenna array. Each oscillator generates 7.2 dBm output power at 140 GHz with -83 dBc/Hz phase noise at 100 KHz and consumes 25 mW of power. An oscillator is followed by a tripler that generates -8 dBm output power at 420 GHz. Oscillator and tripler circuits use a smart layer stack up arrangement for their passive elements where the top metal layer of the die is grounded to comply with the planned integration arrangement. This work shows a novel circuit topology for exciting the antenna element which creates the feed element part of the tuned load for the tripler circuit, therefore eliminates the loss of the transition component, and maximizes the output power delivered to the antenna. The final structure is composed of 32 injection locked oscillators and drives a 4×4 DRAAM achieves 22.8 dBm EIRP

A Fully Integrated CMOS Receiver.

The rapidly growing wireless communication market is creating an increasing demand for low-cost highly-integrated radio frequency (RF) communication systems. This dissertation focuses on techniques to enable fully-integrated, wireless receivers incorporating all passive components, including the antenna, and also incorporating baseband synchronization on-chip. Not only is the receiver small in size and requires very low power, but it also delivers synchronized demodulated data. This research targets applications such as implantable neuroprosthetic devices and environmental wireless sensors, which need short range, low data-rate wireless communications but a long lifetime. To achieve these goals, the super-regenerative architecture is used, since power consumption with this architecture is low due to the simplified receiver architecture. This dissertation presents a 5GHz single chip receiver incorporating a compact on-chip 5 GHz slot antenna (50 times smaller than traditional dipole antennas) and a digital received data synchronization. A compact capacitively-loaded 5 GHz standing-wave resonator is used to improve the energy efficiency. An all-digital PLL timing scheme synchronizes the received data clock. A new type of low-power envelope detector is incorporated to increase the data rate and efficiency. The receiver achieves a data rate up to 1.2 Mb/s, dissipates 6.6 mW from a 1.5 V supply. The novel on-chip capacitively-loaded, transmission-line-standing-wave resonator is employed instead of a conventional low-Q on-chip inductor. The simulated quality factor of the resonator is very high (35), and is verified by phase-noise measurements of a prototype 5GHz Voltage Control Oscillator (VCO) incorporating this resonator. The prototype VCO, implemented in 0.13 µm CMOS, dissipates 3 mW from a 1.2 V supply, and achieves a measured phase noise of -117 dBc/Hz at a 1 MHz offset. In the on-chip antenna an efficient shielding technique is used to shield the antenna from the low-resistivity substrate underneath. Two standalone on-chip slot antenna prototypes were designed and fabricated in 0.13 µm CMOS. The 9 GHz prototype occupies a die area of only 0.3 mm2, has an active gain of -4.4 dBi and an efficiency of 9%. The second prototype occupies a die area of 0.47 mm2, and achieves a passive gain of approximately -17.0 dBi at 5 GHz.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/60739/1/shid_1.pd