An Octave-Range, Watt-Level, Fully-Integrated CMOS Switching Power Mixer Array for Linearization and Back-Off-Efficiency Improvement

The power mixer array is presented as a novel power generation approach for non-constant envelope signals. It comprises several power mixer units that are dynamically turned on and off to improve the linearity and back-off efficiency. At the circuit level, the power mixer unit can operate as a switching amplifier to achieve high peak power efficiency. Additional circuit level linearization and back-off efficiency improvement techniques are also proposed. To demonstrate the feasibility of this idea, a fully-integrated octave-range CMOS power mixer array is implemented in a 130 nm CMOS process. It is operational between 1.2 GHz and 2.4 GHz and can generate an output power of +31.3 dBm into an external 50 Ω load with a PAE of 42% and a gain compression of only 0.4 dB at 1.8 GHz. It achieves a PAE of 25%, at an average output power of +26.4 dBm, and an EVM of 4.6% with a non-constant-envelope 16 QAM signal. It can also produce arbitrary signal levels down to -70 dBm of output power with the 16 QAM-modulated signal without any RF gain control circuit

Circuit-aware system design techniques for wireless communication

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.Includes bibliographical references (p. 211-218).When designing wireless communication systems, many hardware details are hidden from the algorithm designer, especially with analog hardware. While it is difficult for a designer to understand all aspects of a complex system, some knowledge of circuit constraints can improve system performance by relaxing design constraints. The specifications of a circuit design are generally not equally difficult to meet, allowing excess margin in one area to be used to relax more difficult design constraints. We first propose an uplink/downlink architecture for a network with a multiple antenna central server. This design takes advantage of the central server to allow the nodes to achieve multiplexing gain by forming virtual arrays without coordination, or diversity gain to decrease SNR requirements. Computation and memory are offloaded from the nodes to the server, allowing less complex, inexpensive nodes to be used. We can further use this SNR margin to reduce circuit area and power consumption, sacrificing system capacity for circuit optimization. Besides the more common transmit power reduction, large passive analog components can be removed to reduce chip area, and bias currents lowered to save power at the expense of noise figure. Given the inevitable crosstalk coupling of circuits, we determine the minimum required crosstalk isolation in terms of circuit gain and signal range.(cont.) Viewing the crosstalk as a static fading channel, we derive a formula for the asymptotic SNR loss, and propose phase randomization to reduce the strong phase dependence of the crosstalk SNR loss. Because the high peak to average power (PAPR) that results from multicarrier systems is difficult for analog circuits to handle, the result is low power efficiencies. We propose two algorithms, both of which can decrease the PAPR by 4 dB or more, resulting in an overall power reduction by over a factor of three in the high and low SNR regimes, when combined with an outphasing linear amplifier.by Everest Wang Huang.Ph.D

Circuit-Aware System Design Techniques for Wireless Communication

Thesis Supervisor: Gregory W. Wornell Title: ProfessorWhen designing wireless communication systems, many hardware details are hidden from the algorithm designer, especially with analog hardware. While it is difficult for a designer to understand all aspects of a complex system, some knowledge of circuit constraints can improve system performance by relaxing design constraints. The specifications of a circuit design are generally not equally difficult to meet, allowing excess margin in one area to be used to relax more difficult design constraints. We first propose an uplink/downlink architecture for a network with a multiple antenna central server. This design takes advantage of the central server to allow the nodes to achieve multiplexing gain by forming virtual arrays without coordination, or diversity gain to decrease SNR requirements. Computation and memory are offloaded from the nodes to the server, allowing less complex, inexpensive nodes to be used. We can further use this SNR margin to reduce circuit area and power consumption, sacrificing system capacity for circuit optimization. Besides the more common trans- mit power reduction, large passive analog components can be removed to reduce chip area, and bias currents lowered to save power at the expense of noise figure. Given the inevitable crosstalk coupling of circuits, we determine the minimum required crosstalk isolation in terms of circuit gain and signal range. Viewing the crosstalk as a static fading channel, we derive a formula for the asymptotic SNR loss, and propose phase randomization to reduce the strong phase dependence of the crosstalk SNR loss. Because the high peak to average power (PAPR) that results from multicarrier systems is difficult for analog circuits to handle, the result is low power efficiencies. We propose two algorithms, both of which can decrease the PAPR by 4 dB or more, resulting in an overall power reduction by over a factor of three in the high and low SNR regimes, when combined with an outphasing linear amplifier.MIT, the Semiconductor Research Corpo- ration and MARCO C2S2, and Lincoln Laboratory

Multi-Band Outphasing Power Amplifier Design for Mobile and Base Stations

New generations of wireless communication systems require linear efficient RF power amplifiers (PAs) for higher transmission data rates and longer battery life. On the contrary, conventional PAs are normally designed for peak efficiency under maximum output power (Pout). Thus, in power back-off, the overall efficiency degrades significantly and the average efficiency is much lower than the efficiency at maximum Pout. Chireix outphasing PA, also called LINC (Linear amplification using Non-linear Components), is one of the most promising techniques to improve the efficiency at power back-off. In this method, a variable envelope input signal is first decomposed into two constant-envelope phase-modulated signals and then amplified using two highly efficient non-linear PAs. The output signals are combined preferably in a loss-less power combiner to build the desired output signal. In this way, the PA exhibits high efficiency with good linearity. In this thesis, first we analyze a complex model of outphasing combiner considering its nonidealities such as reflection and loss in transmission lines (TL). Then we propose a compact model with analytical formula that is validated through several comparative tests using ADS and Spectre RF. Furthermore, we analyze the effect of reactive load in Chireix combiner with stubs (a parallel inductor and capacitor), while distinguishing between its capacitive and inductive parts. It is demonstrated that only the capacitive part of the reactive load degrades the performances. Based on this, a new architecture (Z LINC) is proposed where the power combiner is designed to provide a zero capacitive load to the PAs whatever the outphasing angle. The theory describing the operations of the system is developed and a 900 MHz classical LINC and Z-LINC PAs are designed and measured. In addition, a miniaturization technique is proposed which employs λ/8 or smaller TLs instead of conventional λ/4 TLs in outphasing power combiner. This technique is applied to implement a 900 MHz PA using LDMOS power transistors. Besides single-band PAs, dual-band PAs are more and more needed because of an increasing demand for wireless communication terminals to handle multi-band operation. In chapter 5, a new compact design approach for dual-band transmitters based on a reconfigurable outphasing combiner is proposed. The objective is to avoid the cumbersome implementations where several PAs and matching network are used in parallel. The technique is applied to design a dual band PA with a fully integrated power combiner in 90 nm CMOS technology. An inverter-based class D PA topology, particularly suitable for outphasing and multimode operations is presented. The TLs in the combiner, realized using a network of on-chip series inductors and parallel capacitors, are reconfigurable from λ/4 in 1800 MHz to λ/8 in 900 MHz. In order to maximize the efficiency, the on-chip inductors are implemented using high quality factor on chip slab inductors. The measured maximum Pout at 900/1800 MHz are 24.3 and 22.7 dBm with maximum efficiencies of 51% and 34% respectively

Techniques for high-efficiency outphasing power amplifiers

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references (p. 171-177).A trade-off between linearity and efficiency exists in conventional power amplifiers (PAs). The outphase amplifying concept overcomes this trade-off by enabling the use of high efficiency, non-linear power amplifiers for linear amplification. However, the efficiency improvement is limited by the efficiency of the output power combiner. This thesis investigates techniques to overcome this efficiency limit while maintaining sufficient linearity. Two techniques are proposed. The first technique is called the outphasing energy recovery amplifier (OPERA), which recovers the normally wasted power back to the power supply and utilizes a resistance compression network for improved linearity. A 48-MHz, 20-W prototype OPERA system was built which demonstrates more than 2x higher efficiency than the standard outphasing system for a 16-QAM signal. The second technique to improve the efficiency of the outphasing system is asymmetric multilevel outphasing (AMO) modulation. In the AMO system, the amplitude for each of the two outphased PAs can switch independently among multiple discrete levels, significantly reducing the energy lost in the power combiner. Three different AMO prototypes were built, each of which demonstrate between 2x-3x efficiency improvement compared to the standard outphasing system. A 2.4-GHz, 500- mW prototype made in a 65-nm CMOS process achieves an average system efficiency of 28.7% for a 20-MHz 64-QAM signal. To the author's best knowledge, this is the highest reported efficiency for a CMOS PA in the 2-2.7 GHz range for signal bandwidths greater than 10 MHz.by Philip Andrew Godoy.Ph.D

Space-time/frequency/scale representation of the turbulence near the wall

International audienceIt is proved that the Window Average Gradient (WAG) scheme designed to detect singularities in the turbulence is approximately equivalent to the Hilbert transform of the "Mexican Hat" wavelet. Several identities are derived between these schemes and their validity are theoretically and experimentally shown through the fluctuating wall shear stress and velocity data taken in the turbulent boundary layer. The instantaneous amplitude-frequency representation of WAG at the large scale is also considered. These results indicate that the wall turbulence is significantly regular. It is shown that the near wall singularities involve in the large scale frequency shift key process and that the corresponding instantaneous phase consists of discontinuous line segments

Lossless multi-way power combining and outphasing for radio frequency power amplifiers

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (p. 102-106).For applications requiring the use of power amplifiers (PAs) operating at high frequencies and power levels, it is often preferable to construct multiple low power PAs and combine their output powers to form a high-power PA. Moreover, such PAs must often be able to provide dynamic control of their output power over a wide range, and maintain high efficiency across their operating range. This research work describes a new power combining and outphasing system that provides both high efficiency and dynamic output power control. The introduced system combines power from four or more PAs, and overcomes the loss and reactive loading problems of previous outphasing systems. It provides ideally lossless power combining, along with nearly-resistive loading of the individual power amplifiers over a very wide output power range. The theoretical fundamentals underlying the behavior and operation of this new combining system are thoroughly developed. Additionally, a straight-forward combiner design methodology is provided. The prototype design of a 27.12 MHz, four-way power combining and outphasing system is presented, implemented, and its performance is experimentally validated over a 1OW-1OOW (10:1) output power range.by Alexander S. Jurkov.S.M

Linearizing Radio Frequency Power Amplifiers Using an Analog Predistortion Technique

As critical elements of the physical infrastructure that enables ubiquitous wireless connectivity, radio frequency power amplifiers (RFPAs) are constantly pushed to the limits of linear but efficient operation. Digital predistortion, as a means of circumventing the limitations of this inherent linearity – efficiency trade-off, has been a subject of prolific research for well over a decade. However, to support the unrestrained growth of broadband mobile traffic, wireless networks are expected to rely increasingly on heterogeneously-sized small cells which necessitate new predistortion solutions operating at a fraction of the power consumed by digital predistortion approaches. This thesis pertains to an emerging area of research involving analog predistortion (APD) – a promising, low-power alternative to digital predistortion (DPD) for future wireless networks. Specifically, it proposes a mathematical function that can be used by the predistorter to linearize RFPAs. As a preliminary step, the challenges of transitioning from DPD to APD are identified and used to formulate the constraints that APD imposes on the predistorter function. Following an assessment of the mathematical functions commonly used for DPD, and an analysis of the physical mechanisms of RFPA distortion, a new candidate function is proposed. This function is both compatible with and feasible for an APD implementation, and offers competitive performance against more complex predistorter functions (that can only be implemented in DPD). The proposed predistorter function and its associated coefficient identification procedure are experimentally validated by using them to linearize an RFPA stimulated with single-band carrier aggregated signals of progressively wider bandwidths. The solution is then extended to the case of dual-band transmission, and subsequently validated on an RFPA as well. The proposed function is a cascade of a finite impulse response filter and an envelope memory polynomial and has the potential to deliver far better linearization results than what has been demonstrated to date in the APD literature

Development of a Digital Feedback System for Advanced Ion Manipulation Techniques within a Penning Trap

The high-precision Penning-trap mass spectrometer Pentatrap aims at measurements of mass ratios of highly charged ions with an uncertainty of a few parts in 10−12. Within the context of this thesis, the development of an active feedback system and its possible applications for the Pentatrap experiment are described. This system allows to electronically feed back the signal from the axial detection electronics to one or multiple electrodes of the Penning trap, enabling the implementation of advanced ion manipulation techniques. It was successfully used to cool the apparent temperature of the detection electronics below the 4.2 K environment of the trap setup, enabling the application of ion feedback cooling. Furthermore, the quality-factor and the center frequency of the resonator, used in the detection system, was shown to be modified by coupling the feedback signal to the resonator. The feedback system was implemented using a novel concept, making use of real-time digital processing algorithms on an FPGA. This leads to very stable feedback operation and allows for highly dynamic variation of the feedback parameters, opening the possibility for new measurement schemes. A phase-sensitive measurements technique for the axial frequency was successfully implemented and tested, which inherently has the potential to achieve better accuracy compared to the commonly used axial dip detection. Additionally, a single-ion self-excited oscillator was realized, enabling the determination of the axial frequency at very high repetition rates. As the precision of the Pentatrap experiment is currently mainly limited by the uncertainty of the axial frequency measurement, the feedback system developed in this thesis will directly contribute to improving the precision of the mass measurements