Energy Detection UWB Receiver Design using a Multi-resolution VHDL-AMS Description

Ultra Wide Band (UWB) impulse radio systems are appealing for location-aware applications. There is a growing interest in the design of UWB transceivers with reduced complexity and power consumption. Non-coherent approaches for the design of the receiver based on energy detection schemes seem suitable to this aim and have been adopted in the project the preliminary results of which are reported in this paper. The objective is the design of a UWB receiver with a top-down methodology, starting from Matlab-like models and refining the description down to the final transistor level. This goal will be achieved with an integrated use of VHDL for the digital blocks and VHDL-AMS for the mixed-signal and analog circuits. Coherent results are obtained using VHDL-AMS and Matlab. However, the CPU time cost strongly depends on the description used in the VHDL-AMS models. In order to show the functionality of the UWB architecture, the receiver most critical functions are simulated showing results in good agreement with the expectations

A VHDL-AMS Simulation Environment for an UWB Impulse Radio Transceiver

Ultra-Wide-Band (UWB) communication based on the impulse radio paradigm is becoming increasingly popular. According to the IEEE 802.15 WPAN Low Rate Alternative PHY Task Group 4a, UWB will play a major role in localization applications, due to the high time resolution of UWB signals which allow accurate indirect measurements of distance between transceivers. Key for the successful implementation of UWB transceivers is the level of integration that will be reached, for which a simulation environment that helps take appropriate design decisions is crucial. Owing to this motivation, in this paper we propose a multiresolution UWB simulation environment based on the VHDL-AMS hardware description language, along with a proper methodology which helps tackle the complexity of designing a mixed-signal UWB System-on-Chip. We applied the methodology and used the simulation environment for the specification and design of an UWB transceiver based on the energy detection principle. As a by-product, simulation results show the effectiveness of UWB in the so-called ranging application, that is the accurate evaluation of the distance between a couple of transceivers using the two-way-ranging metho

Parametric Macromodels of Differential Drivers and Receivers

This paper addresses the modeling of differential drivers and receivers for the analog simulation of high-speed interconnection systems. The proposed models are based on mathematical expressions, whose parameters can be estimated from the transient responses of the modeled devices. The advantages of this macromodeling approach are: improved accuracy with respect to models based on simplified equivalent circuits of devices; improved numerical efficiency with respect to detailed transistor-level models of devices; hiding of the internal structure of devices; straightforward circuit interpretation; or implementations in analog mixed-signal simulators. The proposed methodology is demonstrated on example devices and is applied to the prediction of transient waveforms and eye diagrams of a typical low-voltage differential signaling (LVDS) data link

VSS : a VHDL synthesis system

This report describes a register transfer synthesis system that allows a designer to interact with the design process. The designer can modify the compiled design by changing the input description, selecting optimization and mapping strategies, or graphically changing the generated design schematic. The VHDL language is used for input and output descriptions. An intermediate representation which incorporates signal typing and component attributes simplifies compilation and facilitates design optimization. The compilation process consists of two phases. First, a design composed of generic components is synthesized from the input description. Second, this design is translated into components from a particular library by a mapper and optimized by a logic optimizer. Redesign to new technologies can be accomplished by changing only the component library

Behavioral synthesis from VHDL using structured modeling

This dissertation describes work in behavioral synthesis involving the development of a VHDL Synthesis System VSS which accepts a VHDL behavioral input specification and performs technology independent synthesis to generate a circuit netlist of generic components. The VHDL language is used for input and output descriptions. An intermediate representation which incorporates signal typing and component attributes simplifies compilation and facilitates design optimization.A Structured Modeling methodology has been developed to suggest standard VHDL modeling practices for synthesis. Structured modeling provides recommendations for the use of available VHDL description styles so that optimal designs will be synthesized.A design composed of generic components is synthesized from the input description through a process of Graph Compilation, Graph Criticism, and Design Compilation. Experiments were performed to demonstrate the effects of different modeling styles on the quality of the design produced by VSS. Several alternative VHDL models were examined for each benchmark, illustrating the improvements in design quality achieved when Structured Modeling guidelines were followed

Architecture Specifications in CλaSH

This paper introduces CλaSH, a novel hardware specification environment, by discussing several non-trivial examples. CλaSH is based on the functional language Haskell, and exploits many of its powerful abstraction mechanisms such as higher order functions, polymorphism, lambda abstraction, pattern matching, type derivation. As a result, specifications in CλaSH are concise and semantically clear, and simulations can be directly executed within a Haskell evaluation environment. CλaSH generates synthesizable low-level VHDL code by applying several transformation rules to a functional specification of a digital circuit

From FPGA to ASIC: A RISC-V processor experience

This work document a correct design flow using these tools in the Lagarto RISC- V Processor and the RTL design considerations that must be taken into account, to move from a design for FPGA to design for ASIC

Modeling and simulation of magnetic components in electric circuits

This thesis demonstrates how by using a variety of model constructions and parameter extraction techniques, a range of magnetic component models can be developed for a wide range of application areas, with different levels of accuracy appropriate for the simulation required. Novel parameter extraction and model optimization methods are developed, including the innovative use of Genetic Algorithms and Metrics, to ensure the accuracy of the material models used. Multiple domain modeling, including the magnetic, thermal and magnetic aspects are applied in integrated simulations to ensure correct and complete dynamic behaviour under a range of environmental conditions. Improvements to the original Jiles-Atherton theory to more accurately model loop closure and dynamic thermal behaviour are proposed, developed and tested against measured results. Magnetic Component modeling techniques are reviewed and applied in practical examples to evaluate the effectiveness of lumped models, 1D and 2D Finite Element Analysis models and coupling Finite Element Analysis with Circuit Simulation. An original approach, linking SPICE with a Finite Element Analysis solver is presented and evaluated. Practical test cases illustrate the effectiveness of the models used in a variety of contexts. A Passive Fault Current Limiter (FCL) was investigated using a saturable inductor with a magnet offset, and the comparison between measured and simulated results allows accurate prediction of the behaviour of the device. A series of broadband hybrid transformers for ADSL were built, tested, modeled and simulated. Results show clearly how the Total Harmonic Distortion (THD), Inter Modulation Distortion (IMD) and Insertion Loss (IL) can be accurately predicted using simulation.A new implementation of ADSL transformers using a planar magnetic structure is presented, with results presented that compare favourably with current wire wound techniques. The inclusion of transformer models in complete ADSL hybrid simulations demonstrate the effectiveness of the models in the context of a complete electrical system in predicting the overall circuit performance