6 research outputs found

    Configurable circuits and their impact on multi-standard RF front-end architectures

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    This thesis studies configurable circuits and their impact on multi-standard RF front-end architectures. In particular, low-voltage low-power linear LNA and mixer topologies suitable for implementation in multi-standard front-ends are subject of the investigation. With respect to frequency and bandwidth, multi-standard front-ends can be implemented using either tunable or wideband LNA and mixer topologies. Based on the type of the LNA and mixer(s), multi-standard receiver RF front-ends can be divided into three groups. They can be (tunable) narrow-band, wide-band or combined. The advantages and disadvantages of the different multi-standard receiver RF front-ends have been discussed in detail. The partitioning between off-chip selectivity, on-chip selectivity provided by the LNA and mixer, linearity, power consumption and occupied chip area in each multi-standard RF front-end group are thoroughly investigated. A Figure of Merit (FOM) for the multi-standard receiver RF front-end has been introduced. Based on this FOM the most suitable multi-standard RF front-end group in terms of cost-effectiveness can be selected. In order to determine which multi-standard RF front-end group is the most cost-effective for a practical application, a GSM850/E-GSM/DCS/PCS/Bluetooth/WLANa/b/g multi-standard receiver RF front-end is chosen as a demonstrator. These standards are the most frequently used standards in wireless communication, and this combination of standards allows to users almost "anytime-anywhere" voice and data transfer. In order to verify these results, three demonstrators have been defined, designed and implemented, two wideband RF front-end circuits in 90nm CMOS and 65nm CMOS, and one combined multi-standard RF front-end circuit in 65nm CMOS. The proposed multi-standard demonstrators have been compared with the state-of the art narrow-band, wide-band and combined multi-standard RF front-ends. On the proposed multi-standard RF front-ends and the state-of the art multi-standard RF front-ends the proposed FOM have been applied. The comparison shows that the combined multi-standard RF front-end group is the most cost effective multi-standard group for this application

    Designing Flexible, Energy Efficient and Secure Wireless Solutions for the Internet of Things

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    The Internet of Things (IoT) is an emerging concept where ubiquitous physical objects (things) consisting of sensor, transceiver, processing hardware and software are interconnected via the Internet. The information collected by individual IoT nodes is shared among other often heterogeneous devices and over the Internet. This dissertation presents flexible, energy efficient and secure wireless solutions in the IoT application domain. System design and architecture designs are discussed envisioning a near-future world where wireless communication among heterogeneous IoT devices are seamlessly enabled. Firstly, an energy-autonomous wireless communication system for ultra-small, ultra-low power IoT platforms is presented. To achieve orders of magnitude energy efficiency improvement, a comprehensive system-level framework that jointly optimizes various system parameters is developed. A new synchronization protocol and modulation schemes are specified for energy-scarce ultra-small IoT nodes. The dynamic link adaptation is proposed to guarantee the ultra-small node to always operate in the most energy efficiency mode, given an operating scenario. The outcome is a truly energy-optimized wireless communication system to enable various new applications such as implanted smart-dust devices. Secondly, a configurable Software Defined Radio (SDR) baseband processor is designed and shown to be an efficient platform on which to execute several IoT wireless standards. It is a custom SIMD execution model coupled with a scalar unit and several architectural optimizations: streaming registers, variable bitwidth, dedicated ALUs, and an optimized reduction network. Voltage scaling and clock gating are employed to further reduce the power, with a more than a 100% time margin reserved for reliable operation in the near-threshold region. Two upper bound systems are evaluated. A comprehensive power/area estimation indicates that the overhead of realizing SDR flexibility is insignificant. The benefit of baseband SDR is quantified and evaluated. To further augment the benefits of a flexible baseband solution and to address the security issue of IoT connectivity, a light-weight Galois Field (GF) processor is proposed. This processor enables both energy-efficient block coding and symmetric/asymmetric cryptography kernel processing for a wide range of GF sizes (2^m, m = 2, 3, ..., 233) and arbitrary irreducible polynomials. Program directed connections among primitive GF arithmetic units enable dynamically configured parallelism to efficiently perform either four-way SIMD GF operations, including multiplicative inverse, or a long bit-width GF product in a single cycle. This demonstrates the feasibility of a unified architecture to enable error correction coding flexibility and secure wireless communication in the low power IoT domain.PHDComputer Science & EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137164/1/yajchen_1.pd

    Fully Integrated High-Performance MEMS Lumped Element Filters for Reconfigurable Radios.

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    In this research, we present RF MEMS filters which address the most challenging performance requirements of modern RF front-end systems, namely multi-band processing capability, low energy consumption, and small size. These filters not only provide a wide tuning range for multiple-band selection, but also offer low loss, high power handling capability, fast tuning speed, and temperature stability. Two different technologies are considered for tunable lumped element filter targeting UHF range. The first technology is a tunable RF MEMS platform based on surface micromachining, enabling fabrication of continuously tuned capacitors, capacitive and ohmic switches, as well as high-Q inductors, all on a single chip. The filter is in a third-order coupled resonator configuration. Continuous electrostatic tuning is achieved using three tunable capacitor banks each consisting of one continuously tunable capacitor and three switched capacitors with pull-in voltage of less than 40V. The center frequency of the filter is tuned from 1GHz to 600MHz while maintaining a 3dB-bandwidth of 13 to 14% and insertion loss of 2%. The filter occupies a small size (1.5 cm x 1.0 cm). This filter shows the best published performance yet in terms of insertion loss, out-of-band rejection, temperature stability, and tuning range. The second technology is based on a new tuning mechanism utilizing phase-change (PC) materials. PC technology has been investigated and adopted in memory industry due to its fast transition time in nano second range, small size, and high resistance change ratio. Although PC materials offer several benefits, they have not been considered for RF applications because of their limited power handling capability and relatively higher on-resistance in their current form. In this work, germanium tellurium (GeTe) is considered as it offers a low on-resistivity and pronounced resistance change ratio of up to 106. To characterize RF properties of GeTe, different types of RF switches have been fabricated and compared. Such PC switches can be monolithically integrated with other micromachined components to implement reconfigurable front-end modules, potentially offering high tuning speed, low loss, high linearity, and small size.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/98038/1/yhshim_1.pd
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