Suppression of Quantization-Induced Limit Cyclesin Digitally Controlled DC-DC Converters by Dyadic Digital Pulse Width Modulation

Quantization-induced limit cycle oscillations (LCOs) in digitally controlled DC-DC converters are addressed in this paper. The novel Dyadic Digital PWM (DDPWM) is proposed to increase the effective pulse-width-modulator (PWM) resolution, as required for LCO free operation, at low cost, without sacrificing DC accuracy and with no detrimental effects on the ripple voltage. Experimental results on a synchronous buck validate the approach highlighting effective LCOs suppression and DC accuracy enhancement at 5x reduced output voltage ripple compared to thermometric dithering for the same resolution increase

Time-based control techniques for integrated DC-DC conversion

Time-based control techniques for the design of high switching frequency buck converters are presented. Using time as the processing variable, the proposed controller operates with CMOS-level digital-like signals but without adding any quantization error. A ring oscillator is used as an integrator in place of conventional opamp-RC or Gm-C integrators while a delay line is used to perform voltage-to-time conversion and to sum time signals. A simple flip-flop generates a pulse-width modulated signal from the time-based output of the controller. Hence time-based control eliminates the need for a wide bandwidth error amplifier, pulse width modulator (PWM) in analog controllers or high-resolution analog-to-digital converter (ADC) and digital PWM in digital controllers. As a result, it can be implemented in a small area and with minimal power. First, a time-based single-phase buck converter is proposed and fabricated in a 180nm CMOS process, the prototype buck converter occupies an active area of 0.24mm^2, of which the controller occupies only 0.0375mm^2. It operates over a wide range of switching frequencies (10-25 MHz) and regulates output to any desired voltage in the range of 0.6V to 1.5V with 1.8V input voltage. With a 500mA step in the load current, the settling time is less than 3.5us and the measured reference tracking bandwidth is about 1MHz. Better than 94% peak efficiency is achieved while consuming a quiescent current of only 2uA/MHz. Second, the techniques are extended to a high switching frequency multi-phase buck converter. Efficiency degradation due to mismatch between the phases is mitigated by generating precisely matched duty-cycles by combining a time-based multi-phase generator (MPG) with a time-based PID compensator (T-PID). The proposed approach obviates the need for a complex current sensing and calibration circuitry needed to implement active current sharing in an analog controller. It also eliminates the need for a high-resolution analog-to-digital converter and digital pulse width modulator needed for implementing passive current sharing in a digital controller. Fabricated in a 65nm CMOS process, the prototype multi-phase buck converter occupies an active area of 0.32mm^2, of which the controller occupies only 0.04mm^2. The converter operates over a wide range of switching frequencies (30-70 MHz) and regulates output to any desired voltage in the range of 0.6V to 1.5V from 1.8V input voltage. With a 400mA step in the load current, the settling time is less than 0.6us and the measured duty-cycle mismatch is less than 0.48%. Better than 87% peak efficiency is achieved while consuming a quiescent current of only 3uA/MHz. Finally, light load operation is discussed. The light load efficiency of a time-based buck converter is improved by adding proposed PFM control. At the same time, the proposed seamless transition techniques provide a freedom to change the control mode between PFM and PWM without deteriorating output voltage which allows for a system to manage its power efficiently. Fabricated in a 65nm CMOS, the prototype achieves 90% peak efficiency and > 80% efficiency over an ILOAD range of 2mA to 800mA. VO changes by less than 40mV during PWM to PFM transitions

Diseño e implementación de un modulador de alta resolución para el control digital de convertidores conmutados de potencia que trabajan en alta frecuencia

Mención Internacional en el título de doctorSince the end of the 20th century, technological evolution has been focused on achieving further compact circuit designs in order to improve efficiency and to reduce the weight and volume of electronic equipment. This has been driven by an increase in demand from society's needs due to the reduction in the cost of electronic devices, which has made technology easily accessible and thus making it a product of daily consumption. A very competitive market has increased in order to satisfy all these technological needs demanded by society, which has led to development of more complex electronic designs offering a great number of functions to meet all these needs. All this pursuit of technological innovation has led to the development of large technological systems such as telecommunication networks, aeronautical systems and transport networks. In addition, these advances have allowed to satisfy more daily needs with the design of intelligent devices that help in the domestic field, provide access to information or generate entertainment. Under this context of technological evolution, the use of power converters has played a main role focused on efficient energy management. Its development has been so important that it has served as the basis for technological solutions previously unfeasible. For instance, cochlear implants, which enable people with hearing problems to distinguish sounds, these implants are supplied by a non-contact energy transfer system. They also have a small size and weight in order to be implanted inside the human body and to reduce power consumption as much as possible. Overall, technological evolution has followed a trend towards ever more compact circuit designs in order to improve efficiency or autonomy and to reduce weight and volume. In line with this trend of miniaturization of circuits, this thesis is focused on the solution of one of the most common problems related to the increase of the switching frequency of power converters controlled by digital devices, which is the limited resolution of the modulator. For this purpose, two architectures are presented and implemented for digital pulse width modulators (DPWM), both implemented in FPGAs, to increase the resolution of the converter modulator. These solutions are designed, implemented, and applied in power converters operating at high frequency to test their real performance. In order to design the proposed DPWMs, a review of the different proposals in the state of the art has been made considering a distinction according to the technology and the different types of architectures used. Once the advantages and disadvantages of each of the advantages have been identified, it was decided to work with FPGA technology. The first original contribution proposed is a modulator capable of generating a pulse where the falling edge is controlled with very high resolution. The DPWM solves many of the problems presented by different state-of-the-art architectures, such as the fact that it does not require manual calibration and automatic routing can be performed on the FPGA. In addition, this design is implemented on two models of Xilinx FPGAs (Artix-7 and Kintex UltraScale-7), where the resolution is significantly improved compared to existing solutions (79.9 ps and 4.997 ps, respectively). The second original proposed architecture allows providing high resolution and independently control to the rising and falling edges. Taking advantage of this independent control of the high-resolution edges, a third original architecture is proposed and used to generate complementary pulses. A first analysis is carried out through simulations with the manufacturer's tool in order to implement the proposed architectures. This information is used to get a first approach of the architectures behavior and observe how the signals are generated by the FPGA. This simulation tool provides an estimation of the resolution achieved with the architecture. Once this simulation has been carried out, the architectures are implemented in the FPGA and the performance and real resolution of the digital controller's output signal is characterized. However, given the difficulty of performing time measurements with an optimal resolution to obtain the minimum increment of the architecture, it was decided to use indirect measurements to determine this value. The temporal resolution measurement is achieved through an indirect calculation of the minimum increase in the mean value of the signal generated with the proposed architectures. Finally, a third high-resolution architecture has been designed for application in the control of real high-frequency power converters. This new architecture is based on the previous one and is capable of generating complementary signals with high resolution. Due to the performed tests, it is possible to obtain a comparison of the effects of having high resolution in different converters together with the importance of the use of the proposed architectures. In addition, the use of this high resolution has been explored in other power electronics applications such as the identification of the frequency response of switched-mode converters operating at high frequency. This allows to design, with a better knowledge of the real converter plant, the high-frequency control loops. The conclusions drawn from each part of this document have been presented in summary form at the end of each chapter. All of them have been validated by experimental tests, simulations with the manufacturer's tools or compared with published literature.Desde finales del siglo XX, la evolución tecnológica ha avanzado en el camino de conseguir diseños de circuitos cada vez más compactos con el fin de mejorar la eficiencia y reducir el peso y volumen de los equipos. Esto se ha debido a un incremento en la demanda de las necesidades tecnológicas por parte de la sociedad a causa de la reducción de los costes en los dispositivos electrónicos. Lo que ha permitido que la tecnología sea más accesible, convirtiéndose en un producto de consumo cotidiano. El satisfacer todas estas necesidades tecnológicas que demanda la sociedad han generado un mercado muy competitivo, lo que ha provocado que cada vez se requiera de implementar diseños electrónicos más complejos que abarquen un mayor número de funciones para cubrir todas estas necesidades. Toda esta carrera de innovación tecnológica ha llegado a impulsar el desarrollo de grandes sistemas tecnológicos como las redes de telecomunicaciones, sistemas aeronáuticos o redes de transporte. Además, estos avances han permitido satisfacer necesidades más cotidianas con el diseño de dispositivos inteligentes que ayudan en el ámbito doméstico, facilitan el acceso a la información o generan entretenimiento. En este contexto de evolución tecnológica, el uso de convertidores de potencia ha jugado un papel principal centrado en la gestión eficiente de la energía. Tal ha sido la importancia de su desarrollo que han servido de base para que sea posible lograr soluciones tecnológicas inviables hasta ese momento. Un claro ejemplo son los implantes cocleares, los cuales permiten a las personas con problemas de audición a distinguir sonidos. Estos implantes se alimentan a través de un sistema de transferencia de energía sin contacto. Además, poseen un tamaño y peso pequeño para implantarse dentro del cuerpo humano y reducir el consumo lo máximo posible. En general, la evolución tecnológica ha seguido una tendencia donde se trata de conseguir diseños de circuitos cada vez más compactos con el fin de mejorar la eficiencia o autonomía y reducir el peso y volumen. En base a esta tendencia de miniaturización de los circuitos, esta tesis se centra en resolver uno de los problemas más comunes debidos al aumento de la frecuencia de conmutación de los convertidores de potencia controlados mediante dispositivos digitales, que es la resolución limitada del modulador. Para ello, se presentan e implementan dos arquitecturas para moduladores digitales por ancho de pulso (DPWM), implementadas en FPGAs, para incrementar la resolución del modulador del convertidor. Estas soluciones se diseñan, se implementan, y se aplican en convertidores de potencia que operan en alta frecuencia para comprobar su funcionamiento real. Para los diseños de los DPWM propuestos, se ha realizado una recopilación de las diferentes propuestas en el estado de la técnica diferenciando según la tecnología y realizando distinciones de las tipologías de arquitecturas empleadas. Una vez se ha identificado las ventajas y desventajas de cada una de las tecnologías digitales y tipos de arquitecturas, se decide trabajar con la tecnología FPGA. La primera contribución original que se propone en esta tesis es un modulador capaz de generar un pulso cuyo flanco de bajada se controla con muy alta resolución. Este diseño soluciona muchos de los problemas que presentan las diferentes arquitecturas del estado del arte, como que no necesita de calibración manual y se puede realizar un rutado automático en la FPGA. Además, este diseño se implementa en dos modelos de FPGAs de Xilinx (Artix-7 y Kintex UltraScale-7), donde se mejora notablemente la resolución frente a las existentes (79,9 ps y 4,997 ps, respectivamente). La segunda arquitectura original propuesta permite dotar de una alta resolución a los flancos de subida y bajada de los pulsos de control de manera independiente. Aprovechando esta ventaja de control independiente de los flancos de alta resolución, se propone una tercera arquitectura original que se utiliza para generar pulsos complementarios. Para la implementación de las arquitecturas propuestas, se realiza un primer análisis a través de simulaciones con la herramienta del fabricante. Esta información se utiliza para tener un primer contacto del funcionamiento de las arquitecturas y cómo se comportan las señales de que genera el controlador. Con la herramienta de simulación, se obtiene una aproximación de cuál es la resolución alcanzada con la arquitectura. Una vez realizada esta simulación, se implementa las arquitecturas en el controlador y se caracteriza el comportamiento y la resolución real de la señal de salida del controlador. Ante la dificultad de realizar mediciones temporales con una resolución óptima para obtener cual es el mínimo incremento de la arquitectura, se decide utilizar medidas indirectas para conocer este valor. La medida de resolución temporal se logra a través de un cálculo indirecto en el mínimo incremento que se produce en el valor medio de la señal generada con las arquitecturas propuestas. Por último, se ha diseñado una tercera arquitectura de alta resolución con el objetivo de aplicarse en el control de convertidores reales de potencia de alta frecuencia. Esta nueva arquitectura está basada en la anterior y es capaz de generar señales complementarias con alta resolución. Gracias a las pruebas realizadas se puede obtener una comparación razonada de cómo afecta tener alta resolución en diferentes convertidores y de la importancia de la utilización de las arquitecturas propuestas. Además, se ha explorado el uso de esta alta resolución en otras aplicaciones de la electrónica de potencia como es la identificación de la respuesta en frecuencia de los convertidores conmutados que funcionan a alta frecuencia. Esto permite poder diseñar, con un mayor conocimiento de la planta real del convertidor, los lazos de control de alta frecuencia para que el convertidor opere en base a un punto de trabajo ajustando de manera autónoma las señales de control. Las conclusiones obtenidas de cada una de las partes de este documento han sido resumidas al final de cada capítulo. Todas ellas han sido validadas a través de pruebas experimentales, simulaciones con herramientas del fabricante o comparadas con las publicaciones realizadas.Programa de Doctorado en Ingeniería Eléctrica, Electrónica y Automática por la Universidad Carlos III de MadridPresidente: Emilio Olías Ruiz.- Secretario: Christian Brañas Reyes.- Vocal: José Fernando Jiménez Varga

REGULATED TRANSFORMER RECTIFIER UNIT FOR MORE ELECTRIC AIRCRAFTS

The impending trends in the global demand of more-electric-aircrafts with higher efficiency, high power density, and high degree of compactness has opened up numerous opportunities in front of avionic industries to develop innovative power electronic interfaces. Traditionally, passive diode-bridge based transformer rectifier units (TRU) have been used to generate a DC voltage supply from variable frequency and variable voltage AC power out of the turbo generators. These topologies suffer from bulky and heavy low-frequency transformer size, lack of DC-link voltage regulation flexibility, high degree of harmonic contents in the input currents, and additional cooling arrangement requirements. This PhD research proposes an alternative approach to replace TRUs by actively controlled Regulated Transformer Rectifier Units (RTRUs) employing the advantages of emerging wide band gap (WBG) semiconductor technology. The proposed RTRU utilizing Silicon Carbide (SiC) power devices is composed of a three-phase active boost power factor correction (PFC) rectifier followed by an isolated phase-shifted full bridge (PSFB) DC-DC converter. Various innovative control algorithms for wide-range input frequency operation, ultra-compact EMI filter design methodology, DC link capacitor reduction approach and novel start-up schemes are proposed in order to improve power quality and transient dynamics and to enhance power density of the integrated converter system. Furthermore, a variable switching frequency control algorithm of PSFB DC-DC converter has been proposed for tracking maximum conversion efficiency at all feasible operating conditions. In addition, an innovative methodology engaging multi-objective optimization for designing electromagnetic interference (EMI) filter stage with minimized volume subjected to the reactive power constraints is analyzed and validated experimentally. For proof-of-concept verifications, three different conversion stages i.e. EMI filter, three-phase boost PFC and PSFB converter are individually developed and tested with upto 6kW (continuous) / 10kW (peak) power rating, which can interface a variable input voltage (190V-240V AC RMS) variable frequency (360Hz – 800Hz) three-phase AC excitation source, emulating the airplane turbo generator and provide an AC RMS voltage of 190V to 260V. According to the experimental measurements, total harmonic distortion (THD) as low as 4.3% and an output voltage ripple of ±1% are achieved at rated output power. The proposed SiC based RTRU prototype is ~8% more efficient and ~50% lighter than state-of-the art TRU technologies