A 300mV-Supply, 2nW-Power, 80pF-Load CMOS Digital-Based OTA for IoT Interfaces

This paper presents a power-efficient Ultra Low Voltage (ULV) Digital-Based Operational Transconductance Amplifier (DB-OTA), which uses static logic gates and processes digitally the analog input signal. Post-layout simulations in 180nm CMOS technology show that at 300mV supply voltage the circuit consumes just 2nW while driving a capacitive load of 80pF with Total Harmonic Distortion lower than 5% at 100mV input signal swing. The total silicon area is 1,426 μm2. The maximum energy efficiency supply for the DB-OTA and its scalability to 40nm CMOS technology node are also demonstrated

A 300mV-Supply Standard-Cell-Based OTA with Digital PWM Offset Calibration

This paper introduces a fully digital pulse-width-modulation (PWM) based calibration technique intended to dynamically compensate the input offset voltage due to process and mismatch in Ultra Low Voltage (ULV) Digital-Based Operational Transconductance Amplifiers (DB-OTA). Post-layout simulations on a DB-OTA circuit in 180nm featuring the proposed calibration technique demonstrate that process and mismatch related offset voltage can be effectively compensated by varying the duty cycle of a square wave signal with minimum performance overhead. The proposed OTA consumes just 7.34nW while driving a capacitive load of 80pF with a Total Harmonic Distortion lower than 2.26% at 100mV input signal swing. The total silicon area is 1,700 um^2

Digital-based analog processing in nanoscale CMOS ICs for IoT applications

3siOver the past two decades, it is evident that there have been significant improvements (and it is expected to) in CMOS digital circuits when compared against analog building block performance. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consumption, and cost, while the techniques running behind the analog signal processing are still lagging. There has been an increasing trend in finding alternative IC design strategies to implement analog functions exploiting digital-in-concept design methodologies to decrease this historical gap. This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This poster shows the advanced of this field in the above scenario, proposing new digital-based analog blocks and proving their performance through silicon measurements.openopenPedro Toledo, Hamilton Klimach, Paolo CrovettiPedro, Toledo; Klimach, Hamilton; Crovetti, PAOLO STEFAN

Digital-Based Analog Processing in Nanoscale CMOS ICs for IoT Applications

L'abstract è presente nell'allegato / the abstract is in the attachmen

Analog processing by digital gates: fully synthesizable IC design for IoT interfaces

Analog integrated circuits do not take advantage of scaling and are easily the bottleneck in terms of cost and performance in Internet of Things (IoT) sensor nodes integrated in nanoscale technologies. While this challenge is most commonly addressed by devising more “digital friendly” analog cells based on traditional design concepts, the possibility to translate analog functions into digital, so that to implement them by true digital gates, is now emerging as a promising alternative. This last approach, which challenges the idea that “analog circuits will be always needed”, is presented in this tutorial starting from the theoretical background to its application in digital-based operational amplifiers, voltage references, oscillators and data converters integrated on silicon which have proposed in recent literature. The applicability of the concepts to the design of ICs which are natively portable across technology nodes and highly reconfigurable, thus enabling dynamic energy quality scaling, as well as a low design effort and a fast time-to-market will be described

Digital-based analog processing in nanoscale CMOS ICs for IoT applications

The Internet-of-Things (IoT) concept has been opening up a variety of applications, such as urban and environmental monitoring, smart health, surveillance, and home automation. Most of these IoT applications require more and more power/area efficient Complemen tary Metal–Oxide–Semiconductor (CMOS) systems and faster prototypes (lower time-to market), demanding special modifications in the current IoT design system bottleneck: the analog/RF interfaces. Specially after the 2000s, it is evident that there have been significant improvements in CMOS digital circuits when compared to analog building blocks. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consump tion, and cost, while the techniques running behind the analog signal processing are still lagging. To decrease this historical gap, there has been an increasing trend in finding alternative IC design strategies to implement typical analog functions exploiting Digital in-Concept Design Methodologies (DCDM). This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This thesis deals with the development of DCDM, demonstrating its compatibility for Ultra-Low-Voltage (ULV) and Power (ULP) IoT applications. This work proves this state ment through the proposing of new digital-based analog blocks, such as an Operational Transconductance Amplifiers (OTAs) and an ac-coupled Bio-signal Amplifier (BioAmp). As an initial contribution, for the first time, a silicon demonstration of an embryonic Digital-Based OTA (DB-OTA) published in 2013 is exhibited. The fabricated DB-OTA test chip occupies a compact area of 1,426 µm2 , operating at supply voltages (VDD) down to 300 mV, consuming only 590 pW while driving a capacitive load of 80pF. With a Total Harmonic Distortion (THD) lower than 5% for a 100mV input signal swing, its measured small-signal figure of merit (FOMS) and large-signal figure of merit (FOML) are 2,101 V −1 and 1,070, respectively. To the best of this thesis author’s knowledge, this measured power is the lowest reported to date in OTA literature, and its figures of merit are the best in sub-500mV OTAs reported to date. As the second step, mainly due to the robustness limitation of previous DB-OTA, a novel calibration-free digital-based topology is proposed, named here as Digital OTA (DIG OTA). A 180-nm DIGOTA test chip is also developed exhibiting an area below the 1000 µm2 wall, 2.4nW power under 150pF load, and a minimum VDD of 0.25 V. The proposed DIGOTA is more digital-like compared with DB-OTA since no pseudo-resistor is needed. As the last contribution, the previously proposed DIGOTA is then used as a building block to demonstrate the operation principle of power-efficient ULV and ultra-low area (ULA) fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing applications (BioDIGOTA) such as extreme low area Body Dust. Measured results in 180nm CMOS confirm that the proposed BioDIGOTA can work with a supply voltage down to 400 mV, consuming only 95 nW. The BioDIGOTA layout occupies only 0.022 mm2 of total silicon area, lowering the area by 3.22X times compared to the current state of the art while keeping reasonable system performance, such as 7.6 Noise Efficiency Factor (NEF) with 1.25 µVRMS input-referred noise over a 10 Hz bandwidth, 1.8% of THD, 62 dB of the common-mode rejection ratio (CMRR) and 55 dB of power supply rejection ratio (PSRR). After reviewing the current DCDM trend and all proposed silicon demonstrations, the thesis concludes that, despite the current analog design strategies involved during the analog block development

Fully-Digital Rail-to-Rail OTA with Sub-1,000 μm2 Area, 250-mV Minimum Supply and nW Power at 150-pF Load in 180nm

A fully-digital operational transconductance amplifier (DIGOTA) architecture for tightly energy-constrained low-cost systems is presented. A 180nm DIGOTA testchip exhibits an area below the 1,000-μm2 wall, and 2.4-nW power under 150pF load, and a minimum supply voltage Vmin of 0.25 V. In the 0.3-0.5 V supply range, DIGOTA improves the areanormalized small (large) signal energy FoM by at least 836X (267X) over prior sub-500mV OTAs, while reducing area by 27-85X. The low-Vmin and nW-power features are shown to enable direct harvesting at the mm scale

Design of an Analog and of a Digital-Based OTA in Flexible Integrated Circuit Technology

In this paper, an Analog and a Digital-Based Operational Transconductance Amplifier (OTA) in a 800nm Indium-Gallium-Zinc-Oxide (IGZO) Thin-Film Transistors (TFT) Flexible Integrated Circuits (FlexICs) technology are presented and compared on the basis of post-layout simulations.The analog OTA (A-OTA) and the Digital-Based OTA (DBOTA) occupy a total area of 42,624μm2 and 25,207μm2, respectively and - based on post-layout Monte Carlo (MC) simulations on 100 samples operated at 3.3V with 50pF capacitive load - they achieve an average gain-bandwidth product (GBW) of 58 kHz and 86 kHz, respectively, with an average power consumption of 90 μW and 113 μW. The simulated standard deviation of the input offset voltage is 22.3mV for the A-OTA and 7.2mV for the DB-OTA while the input-referred integrated noise over the entire GBW is 8.8 μVRMS and 87 μVRMS for the A-OTA and DB-OTA respectively

A novel Digital OTA topology with 66-dB DC Gain and 12.3-kHz Bandwidth

The paper introduces an enhanced digital OTA topology which allows increasing the DC gain thanks to the adoption of an inverter-based output stage. Moreover, a new equivalent small-signal model is proposed which allows to simplify the circuit analysis and paves the way to new frequency compensation strategies. Designed using a 28-nm standard CMOS technology and working at 0.3-V power supply, post-layout simulations show a 66-dB gain and a 12.3-kHz gain bandwidth product while driving a 250-pF capacitive load. As compared to other ultra-low-voltage OTAs in literature, an increase of small and large signal performance, respect to area occupation, equal to 4.6X and 1.5X, respectively, is obtained

Re-thinking Analog Integrated Circuits in Digital Terms: A New Design Concept for the IoT Era

A steady trend towards the design of mostly-digital and digital-friendly analog circuits, suitable to integration in mainstream nanoscale CMOS by a highly automated design flow, has been observed in the last years to address the requirements of the emerging Internet of Things (IoT) applications. In this context, this tutorial brief presents an overview of concepts and design methodologies that emerged in the last decade, aimed to the implementation of analog circuits like Operational Transconductance Amplifiers, Voltage References and Data Converters by digital circuits. The current design challenges and application scenarios as well as the future perspectives and opportunities in the field of digital-based analog processing are finally discussed