Integrated phased array systems in silicon

Silicon offers a new set of possibilities and challenges for RF, microwave, and millimeter-wave applications. While the high cutoff frequencies of the SiGe heterojunction bipolar transistors and the ever-shrinking feature sizes of MOSFETs hold a lot of promise, new design techniques need to be devised to deal with the realities of these technologies, such as low breakdown voltages, lossy substrates, low-Q passives, long interconnect parasitics, and high-frequency coupling issues. As an example of complete system integration in silicon, this paper presents the first fully integrated 24-GHz eight-element phased array receiver in 0.18-μm silicon-germanium and the first fully integrated 24-GHz four-element phased array transmitter with integrated power amplifiers in 0.18-μm CMOS. The transmitter and receiver are capable of beam forming and can be used for communication, ranging, positioning, and sensing applications

Développement d'une architecture innovante de récepteur radar à 77 GHz et démonstration en CMOS 28 nm FDSOI

Grâce à sa capacité à détecter des cibles éloignées malgré une mauvaise visibilité, le radar automobile à 77 GHz joue un rôle important dans l'aide à la conduite. L'utilisation des fréquences millimétriques offre une bonne résolution et une importante capacité d'intégration des circuits. C'est aussi un défi car il faut satisfaire un cahier des charges exigeant sur le bruit et la linéarité du récepteur. Les technologies SiGe BiCMOS ont été les premières utilisées pour la conception de récepteurs radar à 77 GHz. De bons résultats ont été obtenus en se basant sur des architectures utilisant des mélangeurs actifs. Cependant l'utilisation des technologie BiCMOS se traduisait par une consommation élevée, une faible capacité d'intégration et des coûts de production importants. Récemment, l'intégration des procédés CMOS menant à l'augmentation des fréquences de transition rend ces technologies plus attractives pour les applications nécessitant un faible coût et la cointégration de plusieurs fonctions au sein d'une même puce. La littérature sur les récepteurs radars en technologie CMOS à 77 GHz montre que les architectures inspirées par les technologies BiCMOS ne sont pas pertinentes pour cette application. Le but de cette thèse et de montrer que l'utilisation de techniques propres aux technologie CMOS comme l'échantillonnage et l'utilisation de portes logiques permet d'obtenir de très bonnes performances. Dans ce travail, deux nouvelles architectures de récepteurs radars basées sur le principe d'échantillonnage sont proposées. La première architecture est basée sur un mélangeur passif échantillonné qui permet d'obtenir un très bon compromis bruit/linéarité. La seconde exploite les propriétés des mélangeurs sous-échantillonnés afin utiliser une fréquence d'OL trois fois inférieure à la fréquence RF offrant ainsi de très intéressantes simplifications au niveau de la chaîne de distribution du signal d'OL du récepteur. Le contexte de cette étude est expliqué dans le 1er chapitre qui présente les exigences de conception liées à l'application radar et fourni une analyse de l'état de l'art des récepteurs à 77 GHZ. Le chapitre suivant décrit le principe de fonctionnement et l'implémentation d'un mélangeur échantillonné à 77 GHz en technologie CMOS 28- nm FDSOI. Une topologie de mélangeur sous-échantillonné utilisant une fréquence d'OL de 26 GHz pour convertir des signaux RF autour de 77 GHz est ensuite détaillée dans le chapitre 3. Le chapitre 4 conclut cette étude en détaillant l'intégration des mélangeurs étudiés dans les chapitres précédents avec un amplificateur faible bruit dans différents récepteurs radars. Ces architectures de récepteurs basées sur l'échantillonnage sont ensuite comparées entre elles et avec l'état de l'art montrant ainsi leurs avantages et inconvénients. Les résultats de cette comparaison confirment l'intérêt des techniques d'échantillonnage pour la conversion de fréquence dans le cadre de l'application radar.With its ability to detect distant targets under harsh visibility conditions, the 77 GHz automotive radar plays a key role in driving safety. Using mm-wave frequencies allow a good range resolution, a better circuit integration and a wide modulation bandwidth. This is also a challenge for circuit designers who must fulfill stringent requirements especially on the receiver front-end. First 77 GHz radar receivers were manufactured with SiGe BiCMOS processes benefiting from the high transition frequency and high breakdown voltage of Hetero-junction Bipolar Transistors (HBT). Good results have been achieved with active-mixer-based architectures, but these technologies suffer from high power consumptions, limited integration capacity and large production cost. More recently, the scaling down of CMOS processes (coming together with the increase of the transition frequency of the transistors) makes CMOS a good candidate for 77 GHz circuit design, especially when cost target requires single chip solutions. The literature related to CMOS radar receivers highlights that receivers based on BiCMOS architectures generally show poor performances. The aim of this work is to demonstrate that using CMOS specific technics such as sampling and the use of high-speed digital gates should enhance the performance of the receivers. In this work, two innovative radar receiver architectures based on the sampling principle are proposed. The first one shows that this principle can be extended to millimeter wave frequencies to benefit from a very good noise/linearity trade-off. While the second one uses this principle to converts a 77 GHz RF signal by using a 26 GHz LO frequency thus simplifying the LO distribution chain of the receiver. The background of this study is introduced in the chapter 1 presenting the design trade-off related to the 77 GHz radar receiver and provides a review of the existing solutions. The following chapter describes the sampling mixer principle and the implementation of a 77 GHz sampling mixer in 28-nm FDSOI CMOS technology. Then, a sub- sampling mixer topology allowing to convert an RF signal around 77 GHz using a 26 GHz LO frequency is detailed in the chapter 3. The chapter 4 draws the conclusion of this study by showing the implementation of the two proposed sampling-based mixers with a low noise amplifier in 77 GHz front ends. These receiver architectures are compared with the state of the art highlighting the strengths and weaknesses of the proposed solutions. The results of this study demonstrates that using sampling for down conversion can be convenient to address millimeter-wave frequency applications

The Future of High Frequency Circuit Design

The cut-off wavelengths of integrated silicon transistors have exceeded the die sizes of the chips being fabricated with them. Combined with the ability to integrate billions of transistors on the same die, this size-wavelength cross-over has produced a unique opportunity for a completely new class of holistic circuit design combining electromagnetics, device physics, circuits, and communication system theory in one place. In this paper, we discuss some of these opportunities and their associated challenges in greater detail and provide a few of examples of how they can be used in practice

On-chip antennas and PCB packaged phased-array radar receiver front-end at mm-wave frequencies

In this dissertation, on-chip antennas for integration in a single RFIC radar chip and alternative wire-bonded PCB/chip package for 77 GHz automotive radar front-end are studied and manufactured. To meet the purpose of dissertation, design and implementation of flat, L-shaped and T-shaped W-band on-chip strip dipole antennas integrated with a LC balun circuit are presented. The on-chip antennas and the balun circuit are realized by using IHP’s 0.25 μm SiGe BiCMOS technology with a localized back-side etch (LBE) module to decrease substrate loss. It has been observed that measurements are highly influenced by the antenna placements and the ACP110-A-GSG-100 probe. Thus, a software calibration is performed similar to a network analyzer calibration to model the effect of ACP probe, and then the antenna reflection coefficient is calculated using the modeled probe-fed antenna. Finally, a low cost 77 GHz 4-element phased-array radar receiver front-end module is designed and manufactured using PCB patch antennas to get rid of on-chip antennas surface wave and achieve better array gain. The receiver package is implemented by integrating active phase shifter chips on a single layer Rogers 3003 PCB board using ball-to-wedge bonding with insertion loss less than 7.5 dB at 77 GHz; this loss is compensated by the gain of chips’ LNA. A novel method which exploits Klopfenstein tapering is used to connect coplanar waveguide to microstrip line at W-band frequency for chip to PCB board transition. The measured gains of the phased-array receiver and passive 4-element antenna array are compared. The receiver and passive array achieve the maximum gains of 9.7 dBi and 10.4 dBi at 77 GHz. The beam can be steered to ±30°

Concepts for Short Range Millimeter-wave Miniaturized Radar Systems with Built-in Self-Test

This work explores short-range millimeter wave radar systems, with emphasis on miniaturization and overall system cost reduction. The designing and implementation processes, starting from the system level design considerations and characterization of the individual components to final implementation of the proposed architecture are described briefly. Several D-band radar systems are developed and their functionality and performances are demonstrated

Building Blocks for a 24 GHz Phased-Array Front-End in CMOS Technology for Smart Streetlights

According to a recent European Union report, lighting represents a significant share of electricity costs and the goal of reducing lighting power consumption by 20% demands the coupling of light-emitting diode (LED) lights with smart sensors and communication networks. In this context, this paper proposes the integration of these three elements into a smart streetlight, incorporating a 24 GHz phased-array (Ph-A) front-end (FE). The main building blocks of this Ph-A FE integrated in a low cost 90 nm complementary metal-oxide-semiconductor (CMOS) technology are fully characterized. The selected FE’s architecture allows the implementation of transceivers as well as Doppler radar sensors functionalities. More specifically, the Ph-A technology is applied to a Doppler radar sensor in order to realize multi-lane road scanning and pedestrian detection. That way, the smart streetlight can become eco-friendly by turning on the LEDs only when necessary as well as to measure traffic parameters such as vehicle speed, type and direction. Intercommunication between the smart streetlights is based on a time-sharing mechanism that uses the same FE reconfigured as transceiver. Thanks to this functionality, the recorded traffic information can be relayed through adjacent streetlights to a control center, and control commands and warnings can be spread through the network. The system requirements are derived assuming a simplified model of the operating scenario with a typical inter-light distance of 50 m and line-of-sight between lights. The radar range is around 60 m, which allows for continuous coverage from one streetlight to the adjacent one. Meanwhile, a communication range of 140 m is derived as a fundamental requirement for reliable communication between streetlight sensors because it allows bypassing of one node in case of failure. For the developed building blocks — a low-noise amplifier, a variable-gain amplifier, a voltage-controlled oscillator and a vector modulation phase shifter — the design methodology is presented together with measurement results. The system power, consumption, noise figure and gain are estimated by means of a system analysis based on the measured data from the implemented blocks and the state of the art performances for the missing parts. It is shown that the requirements can be fulfilled with a total power consumption of around 375 mW in Doppler radar sensor mode and around 190 mW in transceiver mode. To the authors’ knowledge, this kind of integration is new and overcomes some limitations of the currently used solutions based on infrared sensors and low-throughput communications

Phased array antenna element for automotive radar application

In this thesis work, a design of reliable antenna front-end for W band automotive radar is studied and the problems and considerations associated with phased array antenna design at W-band are addressed. Proposed phased array antenna consists of on chip patch antenna which has the advantages of being integrated by the active circuitry. A sample of patch antenna and patch array are designed and fabricated to be tested for their functionality. Printing antenna on Silicon substrate is a compact and cost-effective approach. However, antenna on Silicon will have poor gain and will also suffer from surface wave (SW) excitation. The reason for this is Silicon high dielectric constant and loss. Surface wave can be easily excited on high dielectric constant substrate which results in gain drop and distortion in radiation pattern. To avoid substrate loss, available back etching in foundry process is used to remove the silicon under the radiating antenna and improve the gain. To kill the surface wave, a type of engineered material- called Electromagnetic Band-Gap (EBG)- is designed to filter the SW around the antenna's frequency of operation. To test the fabricated antenna, a measurement setup is implemented to do refection coefficient and radiation pattern measurement. Measured S parameters show that there is frequency shift in response of measured antenna with respect to the simulated one. This shift can be attributed to uncertainty about the dielectric constant of Silicon at W-band. To find the exact value of Silicon dielectric constant, a measurement setup based on free space method is devised to determine the exact value of the silicon dielectric constant at W-Band frequency range