A Wideband 77-GHz, 17.5-dBm Fully Integrated Power Amplifier in Silicon

A 77-GHz, +17.5 dBm power amplifier (PA) with fully integrated 50-Ω input and output matching and fabricated in a 0.12-µm SiGe BiCMOS process is presented. The PA achieves a peak power gain of 17 dB and a maximum single-ended output power of 17.5 dBm with 12.8% of power-added efficiency (PAE). It has a 3-dB bandwidth of 15 GHz and draws 165 mA from a 1.8-V supply. Conductor-backed coplanar waveguide (CBCPW) is used as the transmission line structure resulting in large isolation between adjacent lines, enabling integration of the PA in an area of 0.6 mm^2. By using a separate image-rejection filter incorporated before the PA, the rejection at IF frequency of 25 GHz is improved by 35 dB, helping to keep the PA design wideband

Realization of a single-chip, SiGe:C-based power amplifier for multi-band WiMAX applications

A fully-integrated Multi-Band PA using 0.25 μm SiGe:C process with an output power of above 25 dBm is presented. The behaviour of the amplifier has been optimized for multi-band operation covering, 2.4 GHz, 3.6 GHz and 5.4 GHz (UWB-WiMAX) frequency bands for higher 1-dB compression point and efficiency. Multi-band operation is achieved using multi-stage topology. Parasitic components of active devices are also used as matching components, in turn decreasing the number of matching component. Measurement results of the PA provided the following performance parameters: 1-dB compression point of 20.5 dBm, gain value of 23 dB and efficiency value of %7 operation for the 2.4 GHz band; 1-dB compression point of 25.5 dBm, gain value of 31.5 dB and efficiency value of %17.5 for the 3.6 GHz band; 1-dB compression point of 22.4 dBm, gain value of 24.4 dB and efficiency value of %9.5 for the 5.4 GHz band. Measurement results show that using multi-stage topologies and implementing each parasitic as part of the matching network component has provided a wider-band operation with higher output power levels, above 25 dBm, with SiGe:C process

Millimeter-Wave and Terahertz Transceivers in SiGe BiCMOS Technologies

This invited paper reviews the progress of silicon–germanium (SiGe) bipolar-complementary metal–oxide–semiconductor (BiCMOS) technology-based integrated circuits (ICs) during the last two decades. Focus is set on various transceiver (TRX) realizations in the millimeter-wave range from 60 GHz and at terahertz (THz) frequencies above 300 GHz. This article discusses the development of SiGe technologies and ICs with the latter focusing on the commercially most important applications of radar and beyond 5G wireless communications. A variety of examples ranging from 77-GHz automotive radar to THz sensing as well as the beginnings of 60-GHz wireless communication up to THz chipsets for 100-Gb/s data transmission are recapitulated. This article closes with an outlook on emerging fields of research for future advancement of SiGe TRX performance

A Fully integrated D-band Direct-Conversion I/Q Transmitter and Receiver Chipset in SiGe BiCMOS Technology

This paper presents design and characterization of single-chip 110-170 GHz (D-band) direct conversion in-phase/quadrature-phase (I/Q) transmitter and receiver monolithic microwave integrated circuits (MMICs), realized in a 130 nm SiGe BiCMOS process with ft/fmax of 250 GHz/370 GHz. The chipset is suitable for low power wideband communication and can be used in both homodyne and heterodyne architectures. The Transmitter chip consists of a six-stage power amplifier, an I/Q modulator, and a LO multiplier chain. The LO multiplier chain consists of frequency sixtupler followed by a two-stage amplifier. It exhibits a single sideband conversion gain of 23 dB and saturated output power of 0 dBm. The 3 dB RF bandwidth is 31 GHz from 114 to 145 GHz. The receiver includes a low noise amplifier, I/Q demodulator and x6 multiplier chain at the LO port. The receiver provides a conversion gain of 27 dB and has a noise figure of 10 dB. It has 3 dB RF bandwidth of 28 GHz from 112-140 GHz. The transmitter and receiver have dc power consumption of 240 mW and 280 mW, respectively. The chip area of each transmitter and receiver circuit is 1.4 mm x 1.1 mm

Enabling Solutions for Integration and Interconnectivity in Millimeter-wave and Terahertz Systems

Recently, Terahertz (THz) systems have witnessed increasing attention due to the continuous need for high data rate transmission which is mainly driven by next-generation telecommunication and imaging systems. In that regard, the THz range emerged as a potential domain suitable for realizing such systems by providing a wide bandwidth capable of achieving and meeting the market requirements. However, the realization of such systems faces many challenges, one of which is interconnectivity and high level of integration. Conventional packaging techniques would not be suitable from performance perspective above 100 GHz and new approaches need to be developed. This thesis proposes and demonstrates several approaches to implement interconnects that operate above 100 GHz. One of the most attractive techniques discussed in this work is to implement on-chip coupling structures and insert the monolithic microwave integrated circuit (MMIC) directly into a waveguide (WG). Such approach provides high level of integration and eliminates the need of galvanic contacts; however, it suffers from a major drawback which isthe propagation of parasitic modes in the circuit cavity if the MMIC is large enough to allow such modes to propagate. To mitigate this problem, this work suggests and investigates the use of electromagnetic bandgap (EBG) structures that suppresses those modes such as bed of nails and mushroom-type EBG structures. The proposed techniques are used to implement several on-chip packaging solutions that have an insertion loss as low as 0.6 dB at D-band (110-170 GHz). Moreover, the solutions are demonstrated in several active systems using various commercial MMIC technologies. The thesis also investigates the possibility of utilizing the commercially available packaging technologies such as Embedded Wafer Level Ball Grid Array (eWLB) packaging. Such technology has been widely used for integrated circuits operating below 100 GHz but was not attempted in the THz range before. This work attempts to push the limits of the technology and proposes novel solutions based on coupling structures implemented in the technology’s redistribution layers. The proposed solutions achieve reasonable performance at D-band that are suitable for low-cost mass production while allowing heterogeneous integration with other technologies as well. This work addresses integration challenges facing systems operating in the THz range and proposes high-performance interconnectivity solutions demonstrated in a wide range of commercial technologies and hence enables such systems to reach their full potential and meet the increasing market demands

A RISC-V SOC for Terahertz IoT Devices: Implementation and design challenges

Terahertz (THz) communication is considered a viable approach to augmenting the communication capacity of prospective Internet-of-Things (IoT) resulting in enhanced spectral efficiency. This study first provides an outline of the design challenges encountered in developing THz transceivers. This paper introduces advanced approaches and a unique methodology known as Modified Pulse-width Modulation (MPWM) to address the issues in the THz domain. In this situation involving a transceiver that handles complex modulation schemes, the presence of a mixed signal through a high-resolution digital-to-analog converter (DAC) in the transmitter greatly contributes to the limitation in maintaining linearity at high frequencies. The utilization of Pulse-width Modulation-based Digital-to-Analog Converters (PWM-DACs) has garnered significant attention among scholars due to its efficiency and affordability. However, the converters' performance is restricted by insufficient conversion speed and precision, especially in the context of high-resolution, high-order modulation schemes for THz wireless communications. The MPWM framework offers a multitude of adjustable options, rendering the final MPWM-DAC highly adaptable for a diverse array of application scenarios. Comparative performance assessments indicate that MPWM-DACs have enhanced conversion speed compared to standard PWM-DACs, and they also provide greater accuracy in comparison to Pulse-count Modulation DACs (PCM-DACs). The study presents a comprehensive examination of the core principles, spectrum characteristics, and evaluation metrics, as well as the development and experimental validation of the MPWM method. Furthermore, we present a RISC-V System-on-Chip (SoC) that incorporates an MPWM-DAC, offering a highly favorable resolution for THz IoT communications.Comment: 18 pages, 17 figures, journa

A Direct Carrier I/Q Modulator for High-Speed Communication at D-Band Using 130 nm SiGe BiCMOS Technology

This paper presents a 110-170 GHz direct conversion I/Q modulator realized in 130 nm SiGe BiCMOS technology with ft/fmax values of 250 GHz/ 370 GHz. The design is based on double-balanced Gilbert mixer cells with on-chip quadrature LO phase shifter and RF balun. In single-sideband operation, the modulator exhibits up to 9.5 dB conversion gain and has measured 3 dB IF bandwidth of 12 GHz. The measured image rejection ratio and LO to RF isolation are as high as 20 dB and 31 dB respectively. Meas-ured input P1dB is -17 dBm at 127 GHz output. The DC power con-sumption is 53 mW. The active chip area is 620 μm× 480 μm in-cluding the RF and LO baluns. The circuit is capable of transmit-ting more than 12 Gbit/s QPSK signal