3 research outputs found

    Preamplifier for biological signals processing

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    PrĂĄce se zabĂœvĂĄ problematikou nĂĄvrhu a optimalizace zesilovačƯ v technologii CMOS s nĂ­zkĂœm napĂĄjecĂ­m napětĂ­m a nĂ­zkou spotƙebou. HlavnĂ­m zaměƙenĂ­m prĂĄce je navrhnout zesilovač pro zesĂ­lenĂ­ biologickĂœch signĂĄlu. V prvnĂ­ části prĂĄce je stručnĂœ Ășvod do teorie biologickĂœch signĂĄlĆŻ. DĂĄle prĂĄce obsahuje stručnĂœ popis metod zpracovĂĄnĂ­ biologickĂœch signĂĄlĆŻ a jejich vlastnosti. DĆŻleĆŸitou částĂ­ prĂĄce je popis metod pro snĂ­ĆŸenĂ­ napĂĄjecĂ­ napětĂ­ zesilovače. PraktickĂĄ část tĂ©to prĂĄce je zaměƙena na nĂĄvrh zesilovače s nĂ­zkĂœm napĂĄjecĂ­m napětĂ­m a s nĂ­zkou spotƙebou. VĆĄechny aktivnĂ­ prvky a pƙíklady aplikacĂ­ byly ověƙeny pomocĂ­ PSpice simulacĂ­ s vyuĆŸitĂ­m parametrĆŻ technologie 0,18 ”m TSMC CMOS. Pro ilustraci chovĂĄnĂ­ struktur je v diplomovĂ© prĂĄci zahrnuty simulačnĂ­ vĂœsledky.The work deals with the design and optimization of amplifiers in CMOS technology with low supply voltage and low power consumption. The main aim is to design an amplifier to amplify the biological signal. The first part is a brief introduction to the theory of biological signals. The work also contains a brief description of the biological signal processing methods and their properties. The important part is the description of the methods to reduce the supply voltage of the amplifier. The practical part of this thesis focuses on the design amplifiers with low supply voltage and low power consumption. All active elements and application examples have been verified by PSpice simulator using the 0.18 ”m TSMC CMOS parameters. Simulated plots are included in this thesis to illustrate behavior of structures.

    Design of low-voltage operational amplifier

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    Tato prĂĄce se zabĂœvĂĄ nĂĄvrhem operačnĂ­ho zesilovače s extrĂ©mně nĂ­zkĂœm napĂĄjecĂ­m napětĂ­m a nĂ­zkou spotƙebou. V teoretickĂ© části je pƙedstavena teorie zabĂœvajĂ­cĂ­ se strukturou a nĂĄvrhem operačnĂ­ho zesilovače. V nĂĄsledujĂ­cĂ­ části jsou popsĂĄny nĂĄvrhovĂ© metody vhodnĂ© k realizaci nĂ­zkonapěƄovĂœch obvodĆŻ. V dalĆĄĂ­ části byly navrhnuty dva operačnĂ­ zesilovače s pouĆŸitĂ­m nĂ­zkonapěƄovĂœch metod. Vlastnosti těchto operačnĂ­ch zesilovačƯ byly potĂ© ověƙeny simulacemi.This work deals with the design of operational amplifier with extremely low supply voltage and low power consumption. In the theoretical part is presented theory dealing with the structure and design of operational amplifier. In the following part are desribed design methods suitable for realization of low-voltage circuits. In the next part were designed two operational amplifiers using low-voltage design methods. Properties of these operational amplifiers were then tested by simulations.

    Low Voltage Low Power Analogue Circuits Design

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    DisertačnĂ­ prĂĄce je zaměƙena na vĂœzkum nejbÄ›ĆŸnějĆĄĂ­ch metod, kterĂ© se vyuĆŸĂ­vajĂ­ pƙi nĂĄvrhu analogovĂœch obvodĆŻ s vyuĆŸitĂ­ nĂ­zkonapěƄovĂœch (LV) a nĂ­zkopƙíkonovĂœch (LP) struktur. Tyto LV LP obvody mohou bĂœt vytvoƙeny dĂ­ky vyspělĂœm technologiĂ­m nebo takĂ© vyuĆŸitĂ­m pokročilĂœch technik nĂĄvrhu. DisertačnĂ­ prĂĄce se zabĂœvĂĄ prĂĄvě pokročilĂœmi technikami nĂĄvrhu, pƙedevĆĄĂ­m pak nekonvenčnĂ­mi. Mezi tyto techniky patƙí vyuĆŸitĂ­ prvkĆŻ s ƙízenĂœm substrĂĄtem (bulk-driven - BD), s plovoucĂ­m hradlem (floating-gate - FG), s kvazi plovoucĂ­m hradlem (quasi-floating-gate - QFG), s ƙízenĂœm substrĂĄtem s plovoucĂ­m hradlem (bulk-driven floating-gate - BD-FG) a s ƙízenĂœm substrĂĄtem s kvazi plovoucĂ­m hradlem (quasi-floating-gate - BD-QFG). PrĂĄce je takĂ© orientovĂĄna na moĆŸnĂ© zpĆŻsoby implementace znĂĄmĂœch a modernĂ­ch aktivnĂ­ch prvkĆŻ pracujĂ­cĂ­ch v napěƄovĂ©m, proudovĂ©m nebo mix-mĂłdu. Mezi tyto prvky lze začlenit zesilovače typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za Ășčelem potvrzenĂ­ funkčnosti a chovĂĄnĂ­ vĂœĆĄe zmĂ­něnĂœch struktur a prvkĆŻ byly vytvoƙeny pƙíklady aplikacĂ­, kterĂ© simulujĂ­ usměrƈovacĂ­ a induktančnĂ­ vlastnosti diody, dĂĄle pak filtry dolnĂ­ propusti, pĂĄsmovĂ© propusti a takĂ© univerzĂĄlnĂ­ filtry. VĆĄechny aktivnĂ­ prvky a pƙíklady aplikacĂ­ byly ověƙeny pomocĂ­ PSpice simulacĂ­ s vyuĆŸitĂ­m parametrĆŻ technologie 0,18 m TSMC CMOS. Pro ilustraci pƙesnĂ©ho a ĂșčinnĂ©ho chovĂĄnĂ­ struktur je v disertačnĂ­ prĂĄci zahrnuto velkĂ© mnoĆŸstvĂ­ simulačnĂ­ch vĂœsledkĆŻ.The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the non–conventional ones which are bulk–driven (BD), floating–gate (FG), quasi–floating–gate (QFG), bulk–driven floating–gate (BD–FG) and bulk–driven quasi–floating–gate (BD–QFG) techniques. The thesis also looks at ways of implementing structures of well–known and modern active elements operating in voltage–, current–, and mixed–mode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fully–differential second generation current conveyor (FB–CCII), fully–balanced differential difference amplifier (FB–DDA), voltage differencing transconductance amplifier (VDTA), current–controlled current differencing buffered amplifier (CC–CDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diode–less rectifier and inductance simulations, as well as low–pass, band–pass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.
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