One-pot multi-reaction processes: synthesis of natural products and drug-like scaffolds

One-pot multi-reaction processes involving Overman rearrangements, metathesis cyclizations, and Diels–Alder reactions have been developed for the rapid and efficient synthesis of amino-substituted carbocyclic and heterocyclic compounds. This account describes the development and optimization of these processes, as well as their applications in the synthesis of natural products and drug-like scaffolds

Geometrically-constrained, parasitic-aware synthesis of analog ICs

In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced for this is a very time-consuming task: if circuit performance including layout-induced degradations proves unacceptable, a re-design cycle must be entered, and electrical, physical, or both synthesis processes, would have to be repeated. It is also worth noting that if geometric optimization (e.g., area minimization) is undertaken after electrical synthesis, it may add up as another source of unexpected degradation of the circuit performance due to the impact of the geometric variables (e.g., transistor folds) on the device and the routing parasitic values. This awkward scenario is caused by the complete separation of said electrical and physical synthesis, a design practice commonly followed so far. Parasitic-aware synthesis, consisting in including parasitic estimates to the circuit netlist directly during electrical synthesis, has been proposed as solution. While most of the reported contributions either tackle parasitic-aware synthesis without paying special attention to geometric optimization or approach both issues only partially, this paper addresses the problem in a unified way. In what has been called layout-aware electrical synthesis, a simulation-based optimization algorithm explores the design space with geometric variables constrained to meet certain user-defined goals, which provides reliable estimates of layout-induced parasitics at each iteration, and, thereby, accurate evaluation of the circuit ultimate performance. This technique, demonstrated here through several design examples, requires knowing layout details beforehand; to facilitate this, procedural layout generation is used as physical synthesis approach due to its rapidness and ability to capture analog layout know-how.Ministerio de Educación y Ciencia TEC2004-0175

Optimization of Clifford Circuits

We study optimal synthesis of Clifford circuits, and apply the results to peep-hole optimization of quantum circuits. We report optimal circuits for all Clifford operations with up to four inputs. We perform peep-hole optimization of Clifford circuits with up to 40 inputs found in the literature, and demonstrate the reduction in the number of gates by about 50%. We extend our methods to the optimal synthesis of linear reversible circuits, partially specified Clifford functions, and optimal Clifford circuits with five inputs up to input/output permutation. The results find their application in randomized benchmarking protocols, quantum error correction, and quantum circuit optimization.Comment: 7 pages, 5 figure

Nonlinear control synthesis by convex optimization

A stability criterion for nonlinear systems, recently derived by the third author, can be viewed as a dual to Lyapunov's second theorem. The criterion is stated in terms of a function which can be interpreted as the stationary density of a substance that is generated all over the state-space and flows along the system trajectories toward the equilibrium. The new criterion has a remarkable convexity property, which in this note is used for controller synthesis via convex optimization. Recent numerical methods for verification of positivity of multivariate polynomials based on sum of squares decompositions are used

Optimization in Telecommunication Networks

Network design and network synthesis have been the classical optimization problems intelecommunication for a long time. In the recent past, there have been many technologicaldevelopments such as digitization of information, optical networks, internet, and wirelessnetworks. These developments have led to a series of new optimization problems. Thismanuscript gives an overview of the developments in solving both classical and moderntelecom optimization problems.We start with a short historical overview of the technological developments. Then,the classical (still actual) network design and synthesis problems are described with anemphasis on the latest developments on modelling and solving them. Classical results suchas Menger’s disjoint paths theorem, and Ford-Fulkerson’s max-flow-min-cut theorem, butalso Gomory-Hu trees and the Okamura-Seymour cut-condition, will be related to themodels described. Finally, we describe recent optimization problems such as routing andwavelength assignment, and grooming in optical networks.operations research and management science;

Cycle time optimization by timing driven placement with simultaneous netlist transformations

We present new concepts to integrate logic synthesis and physical design. Our methodology uses general Boolean transformations as known from technology-independent synthesis, and a recursive bi-partitioning placement algorithm. In each partitioning step, the precision of the layout data increases. This allows effective guidance of the logic synthesis operations for cycle time optimization. An additional advantage of our approach is that no complicated layout corrections are needed when the netlist is changed