Shape-induced anisotropy in antidot arrays from self-assembled templates

Using self-assembly of polystyrene spheres, well-ordered templates have been prepared on glass and silicon substrates. Strong guiding of self-assembly is obtained on photolithographically structured silicon substrates. Magnetic antidot arrays with three-dimensional architecture have been prepared by electrodeposition in the pores of these templates. The shape anisotropy demonstrates a crucial impact on magnetization reversal processes

Pulsed PECVD growth of silicon nanowires on various substrates

Silicon nanowires with high aspect ratio were grown using PPECVD and a gold catalyst on a variety of different substrates. The morphology of the nanowires was investigated for a range of crystalline silicon, glass, metal, ITO coated and amorphous silicon coated glass substrates. Deposition of the nanowires was carried out in a parallel plate PECVD chamber modified for PPECVD using a 1kHz square wave to modulate the 13.56MHz RF signal. Samples were analyzed using either a Phillips XL20 SEM of a ZEISS 1555 VP FESEM. The average diameter of the nanowires was found to be independent of the substrate used. The silicon nanowires would grow on all of the substrates tested, however the density varied greatly. It was found that nanowires grew with higher density on the ITO coated glass substrates rather than the uncoated glass substrates. Aligned nanowire growth was observed on polished copper substrates. Of all the substrates trialed, ITO coated aluminosilicate glass proved to be the most effective substrate for the growth of silicon nanowires

Low-temperture electrostatic silicon-to-silicon seals using sputtered borosilicate glass

Silicon members are hermetically sealed to each other. Process produces no measurable deformation of silicon surfaces and is compatible with package designs of tight tolerance. Seals have been made with glass coatings in 10-mm to 20-mm thickness range without any prior annealing of coated silicon substrates

Efficient single-photon emission from electrically driven InP quantum dots epitaxially grown on Si(001)

The heteroepitaxy of III-V semiconductors on silicon is a promising approach for making silicon a photonic platform for on-chip optical interconnects and quantum optical applications. Monolithic integration of both material systems is a long-time challenge, since different material properties lead to high defect densities in the epitaxial layers. In recent years, nanostructures however have shown to be suitable for successfully realising light emitters on silicon, taking advantage of their geometry. Facet edges and sidewalls can minimise or eliminate the formation of dislocations, and due to the reduced contact area, nanostructures are little affected by dislocation networks. Here we demonstrate the potential of indium phosphide quantum dots as efficient light emitters on CMOS-compatible silicon substrates, with luminescence characteristics comparable to mature devices realised on III-V substrates. For the first time, electrically driven single-photon emission on silicon is presented, meeting the wavelength range of silicon avalanche photo diodes' highest detection efficiency

Silicon-slurry/aluminide coating

A low cost coating protects metallic base system substrates from high temperatures, high gas velocity ovidation, thermal fatigue and hot corrosion and is particularly useful fo protecting vanes and blades in aircraft and land based gas turbine engines. A lacquer slurry comprising cellulose nitrate containing high purity silicon powder is sprayed onto the superalloy substrates. The silicon layer is then aluminized to complete the coating. The Si-Al coating is less costly to produce than advanced aluminides and protects the substrates from oxidation and thermal fatigue for a much longer period of time than the conventional aluminide coatings. While more expensive Pt-Al coatings and physical vapor deposited MCrAlY coatings may last longer or provide equal protection on certain substrates, the Si-Al coating exceeded the performance of both types of coatings on certain superalloys in high gas velocity oxidation and thermal fatigue and increased the resistance of certain superalloys to hot corrosion

Graphene-like quaternary compound SiBCN: a new wide direct band gap semiconductor predicted by a first-principles study

Due to the lack of two-dimensional silicon-based semiconductors and the fact that most of the components and devices are generated on single-crystal silicon or silicon-based substrates in modern industry, designing two-dimensional silicon-based semiconductors is highly desired. With the combination of a swarm structure search method and density functional theory in this work, a quaternary compound SiBCN with graphene-like structure is found and displays a wide direct band gap as expected. The band gap is of ~2.63 eV which is just between ~2.20 and ~3.39 eV of the highlighted semiconductors SiC and GaN. Notably, the further calculation reveals that SiBCN possesses high carrier mobility with ~5.14x10^3 and ~13.07x10^3 cm^2V^-1s^-1 for electron and hole, respectively. Furthermore, the ab initio molecular dynamics simulations also show that the graphene-like structure of SiBCN can be well kept even at an extremely high temperature of 2000 K. The present work tells that designing ulticomponent silicides may be a practicable way to search for new silicon-based low-dimensional semiconductors which can match well with the previous Si-based substrates

Electron beam recrystallization of amorphous semiconductor materials

Nucleation and growth of crystalline films of silicon, germanium, and cadmium sulfide on substrates of plastic and glass were investigated. Amorphous films of germanium, silicon, and cadmium sulfide on amorphous substrates of glass and plastic were converted to the crystalline condition by electron bombardment

Seedless electroplating on patterned silicon

Nickel thin films have been electrodeposited without the use of an additional\ud seed layer, on highly doped silicon wafers. These substrates conduct\ud sufficiently well to allow deposition using a peripherical electrical contact on\ud the wafer. Films 2 μm thick have been deposited using a nickel sulfamate\ud bath on both n+- and p+-type silicon wafers, where a series of trenches with\ud different widths had been previously etched by plasma etching. A new,\ud reliable and simple procedure based on the removal of the native oxide layer\ud is presented which allows uniform plating of patterned substrates