Temperature-Independent Current Dispersion in 0.15 μm AlGaN/GaN HEMTs for 5G Applications

Thanks to high-current densities and cutoff frequencies, short-channel length AlGaN/GaN HEMTs are a promising technology solution for implementing RF power amplifiers in 5G front-end modules. These devices, however, might suffer from current collapse due to trapping effects, leading to compressed output power. Here, we investigate the trap dynamic response in 0.15 μm GaN HEMTs by means of pulsed I-V characterization and drain current transients (DCTs). Pulsed I-V curves reveal an almost absent gate-lag but significant current collapse when pulsing both gate and drain voltages. The thermally activated Arrhenius process (with EA ≈ 0.55 eV) observed during DCT measurements after a short trap-filling pulse (i.e., 1 μs) indicates that current collapse is induced by deep trap states associated with iron (Fe) doping present in the buffer. Interestingly, analogous DCT characterization carried out after a long trap-filling pulse (i.e., 100 s) revealed yet another process with time constants of about 1–2 s and which was approximately independent of temperature. We reproduced the experimentally observed results with two-dimensional device simulations by modeling the T-independent process as the charging of the interface between the passivation and the AlGaN barrier following electron injection from the gate

Characterization and TCAD Modeling of Mixed-Mode Stress Induced by Impact Ionization in Scaled SiGe HBTs

We investigate the reliability of state-of-the-art SiGe heterojunction bipolar transistors (HBTs) in 55-nm technology under mixed-mode stress. We perform electrical characterization and implement a TCAD model calibrated on the measurement data to describe the increased base current degradation at different collector-base voltages. We introduce a simple and self-consistent simulation methodology that links the observed degradation trend to interface traps generation at the emitter/base spacer oxide ascribed to hot holes generated by impact ionization (II) in the collector/base depletion region. This effectively circumvents the limitations of commercial TCAD tools that do not allow II to be the driving force of the degradation. The approach accounts for self-heating and electric fields distribution allowing to reproduce measurement data including the deviation from the power-law behavior

Off-state breakdown characteristics of AlGaN/GaN MIS-HEMTs for switching power applications

A consistent description of breakdown characteristics in ohmic-to-ohmic, ohmic-to-substrate and HEMT structures has been achieved by means of device simulations for a depletion-mode AlGaN/GaN MIS-HEMT technology on Si substrate suited for power switching applications. For relatively short gate-drain distances or ohmic-to-ohmic spacings, source-drain punch-through is suggested to be the limiting breakdown mechanism in either HEMTs under off-state conditions or ohmic-to-ohmic isolation test structures, respectively. The mechanism ultimately limiting the HEMT off-state voltage blocking capability is instead the vertical drain-to-substrate breakdown for long gate-drain spacings. The latter phenomenon is induced, in HEMTs on a low-resistivity p-type substrate like those considered here, by the triggering of a high-field carrier generation mechanism rather than by carrier injection

On the Modeling of the Donor/Acceptor Compensation Ratio in Carbon‐Doped GaN to Univocally Reproduce Breakdown Voltage and Current Collapse in Lateral GaN Power HEMTs

The intentional doping of lateral GaN power high electron mobility transistors (HEMTs) with carbon (C) impurities is a common technique to reduce buffer conductivity and increase breakdown voltage. Due to the introduction of trap levels in the GaN bandgap, it is well known that these impurities give rise to dispersion, leading to the so‐called “current collapse” as a collateral effect. Moreover, first‐principles calculations and experimental evidence point out that C introduces trap levels of both acceptor and donor types. Here, we report on the modeling of the donor/acceptor compensation ratio (CR), that is, the ratio between the density of donors and acceptors associated with C doping, to consistently and univocally reproduce experimental breakdown voltage (VBD) and current‐collapse magnitude (ΔICC). By means of calibrated numerical device simulations, we confirm that ΔICC is controlled by the effective trap concentration (i.e., the difference between the acceptor and donor densities), but we show that it is the total trap concentration (i.e., the sum of acceptor and donor densities) that determines VBD, such that a significant CR of at least 50% (depending on the technology) must be assumed to explain both phenomena quantitatively. The results presented in this work contribute to clarifying several previous reports, and are helpful to device engineers interested in modeling C‐doped lateral GaN power HEMTs

The effects of carbon on the bidirectional threshold voltage instabilities induced by negative gate bias stress in GaN MIS-HEMTs

In this paper, numerical device simulations are used to point out the possible contributions of carbon doping to the threshold voltage instabilities induced by negative gate bias stress in AlGaN/GaN metal–insulator–semiconductor high-electron mobility transistors. It is suggested that carbon can have a role in both negative and positive threshold voltage shifts, as a result of (1) the changes in the total negative charge stored in the carbon-related acceptor traps in the GaN buffer, and (2) the attraction of carbon-related free holes to the device surface and their capture into interface traps or recombination with gate-injected electrons. For a proper device optimization of carbon-doped MIS-HEMTs, it is therefore important to take these mechanisms into account, in addition to those related to defects in the gate dielectric volume and interface which are conventionally held responsible for threshold voltage instabilities

Gate-Bias Induced RON Instability in p-GaN Power HEMTs

In this letter, we investigate the on-resistance ( RON ) instability in p-GaN power HEMTs induced by a positive or negative gate bias ( VGB ), following the application of a quasi-static initialization voltage ( VGP ) of opposite sign. The transient behavior of this instability was characterized at different temperatures in the 90–135 °C range. By monitoring the resulting drain current transients, the activation energy as well as time constants of the processes are characterized. Not trivially, both RON increase/decrease were found to be thermally activated and with same activation energy. We attribute the thermal activation of both RON increase/decrease to the charging/discharging of hole traps present in the AlGaN barrier in the region below the gate

On the Dynamic RON, Vertical Leakage and Capacitance Behavior in pGaN HEMTs With Heavily Carbon-Doped Buffers

In this letter, we investigate the effect of Carbon (C) doping concentration on dynamic RON, vertical leakage and Capacitance-Voltage (C-V) characteristics of p-GaN gate High Electron Mobility Transistors (HEMTs). Measurements performed on state-of-the-art samples show that further increasing C-doping concentration in the GaN buffer above 1019 cm−3 yields a reduced dynamic-RON degradation, in contrast with the behavior reported in the literature for lower C-doping concentrations. This is confirmed by a complete data set showing a consistent increase in the vertical leakage and in the output capacitance while increasing the C doping, stemming from a less insulating buffer and a reduced 2-DEG depletion, respectively. These observations can be attributed to an increased incorporation of compensating donors leading to a reduction of the net acceptors as the C doping concentration is raised above 1019 cm−3

Systematic modeling of electrostatics, transport, and statistical variability effects of interface traps in end-of-the-roadmap III–V MOSFETs

Thanks to their superior transport properties, indium gallium arsenide (InGaAs) metal-oxide-semiconductor field-effect transistors (MOSFETs) constitute an alternative to conventional silicon MOSFETs for digital applications at ultrascaled nodes. The successful integration of this technology is challenged mainly by the high defect density in the gate oxide and at the interface with the semiconductor channel, which degrades the electrostatics and could limit the potential benefits over Si. In this work, we: 1) establish a systematic modeling approach to evaluate the performance degradation due to interface traps in terms of electrostatics and transport of InGaAs dual-gate ultrathin body (DG-UTB) FETs and 2) investigate the effects of random interface-trap concentration as another roadblock to the scaling of the technology, due to statistical variability of the threshold voltage. Variability is assessed with a Technology CAD (TCAD) simulator calibrated against multi-subband Monte Carlo (MSMC) simulations. The modeling approach overcomes the TCAD limitations when dealing with ultrathin channels (i.e., below 5 nm) without altering crucial geometrical parameters that would compromise the dependability of the variability analysis. Our results indicate that interface-trap fluctuation becomes comparable with the other variability sources dominating the total variability when shrinking the device dimensions, thus contrasting the trend of reduced variability with scaling. This, in turn, implies that interface and border traps may strongly limit the benefits of InGaAs over Silicon if not effectively reduced by gate process optimization

Modeling challenges for high-efficiency visible light-emitting diodes

In order to predict through numerical simulation the optical and carrier transport properties of GaN-based light-emitting diodes (LEDs), a genuine quantum approach should be combined with an atomistic description of the electronic structure. However, computational considerations have elicited the empirical inclusion of quantum contributions within conventional semiclassical drift-diffusion approaches. The lack of first-principles validation tools has left these \u201cquantum corrections\u201d largely untested, at least in the context of LED simulation. We discuss here the results obtained comparing state-of-the-art commercial numerical simulators, in order to assess the predictive capabilities of some of the most important quantum-based models complementing the drift-diffusion equations

PixFEL: development of an X-ray diffraction imager for future FEL applications

A readout chip for diffraction imaging applications at new generation X-ray FELs (Free Electron Lasers) has been designed in a 65 nm CMOS technology. It consists of a 32 × 32 matrix, with square pixels and a pixel pitch of 110 µm. Each cell includes a low-noise charge sensitive amplifier (CSA) with dynamic signal compression, covering an input dynamic range from 1 to 104 photons and featuring single photon resolution at small signals at energies from 1 to 10 keV. The CSA output is processed by a time-variant shaper performing gated integration and correlated double sampling. Each pixel includes also a small area, low power 10-bit time-interleaved Successive Approximation Register (SAR) ADC for in-pixel digitization of the amplitude measurement. The channel can be operated at rates up to 4.5 MHz, to be compliant with the rates foreseen for future X-ray FEL machines. The ASIC has been designed in order to be bump bonded to a slim/active edge pixel sensor, in order to build the first demonstrator for the PixFEL (advanced X-ray PIXel cameras at FELs) imager