On The Lagrange Interpolation of Fibonacci Sequence

Fibonacci sequence is one of the most common sequences in mathematics. It was first introduced by Leonardo Pisa in his book Liber Abaci (1202). From the first n + 1 terms of Fibonacci sequence, a polynomial of degree at most n can be constructed using Lagrange interpolation. In this paper, we show that this Fibonacci Lagrange Interpolation Polynomial (FLIP) can be obtained both recursively and implicitly

Formal Analysis and Verification of Max-Plus Linear Systems

Max-Plus Linear (MPL) systems are an algebraic formalism with practical applications in transportation networks, manufacturing and biological systems. In this paper, we investigate the problem of automatically analyzing the properties of MPL, taking into account both structural properties such as transient and cyclicity, and the open problem of user-defined temporal properties. We propose Time-Difference LTL (TDLTL), a logic that encompasses the delays between the discrete time events governed by an MPL system, and characterize the problem of model checking TDLTL over MPL. We first consider a framework based on the verification of infinite-state transition systems, and propose an approach based on an encoding into model checking. Then, we leverage the specific features of MPL systems to devise a highly optimized, combinational approach based on Satisfiability Modulo Theory (SMT). We experimentally evaluate the features of the proposed approaches on a large set of benchmarks. The results show that the proposed approach substantially outperforms the state of the art competitors in expressiveness and effectiveness, and demonstrate the superiority of the combinational approach over the reduction to model checking.Comment: 28 pages (including appendixes

ARCH-COMP20 Category Report: Hybrid Systems with Piecewise Constant Dynamics and Bounded Model Checking

This report presents the results of a friendly competition for formal verification of continuous and hybrid systems with piecewise constant dynamics. The friendly competition took place as part of the workshop Applied Verification for Continuous and Hybrid Systems (ARCH) in 2020. In this fourth edition, five tools have been applied to solve six different benchmark problems in the category for piecewise constant dynamics: BACH, PHAVerLite, PHAVer/SX, TROPICAL, and XSpeed. Compared to last year, we combine the HBMC and HPWC categories of ARCH-COMP 2019 to a new category PCDB (hybrid systems with Piecewise Constant bounds on the Dynamics (HPCD) and Bounded model checking (BMC) of HPCD systems). The result is a snapshot of the current landscape of tools and the types of benchmarks they are particularly suited for. Due to the diversity of problems, we are not ranking tools, yet the presented results probably provide the most complete assessment of tools for the safety verification of continuous and hybrid systems with piecewise constant dynamics up to this date

Abstractions and formal verification of max-plus linear systems

Max-Plus Linear (MPL) systems are the class of discrete-event systems (DES) with dynamics based on two binary operations (maximisation and addition) over the so-called max-plus semiring. In practical applications, MPL systems are used to model synchronisation phenomena without concurrency. Such are widely used in railway networks, manufacturing plants, and modelling and studying biological systems. The dual of MPL systems is Min-Plus Linear (MiPL) systems which use minimisation and addition operations. Furthermore, as a natural extension, Interval Max-Plus Linear (IMPL) systems are MPL systems where real-valued intervals characterise the delays between successive discrete events. In general, IMPL systems are more realistic than simple MPL ones. For instance, in a model of a railway network, the travel between two stations may take longer (or possibly faster) than the expected time due to unforeseen external factors such as weather conditions, driver’s behaviour, and the number of departing passengers at stations. The fundamental problems for the systems mentioned above are reachability analysis and formal verification, respectively assessing whether the dynamics of the underlying system eventually reaches a particular set and satisfies the intended specifications or requirements. The state-of-the-art approaches to tackle these problems employ the abstraction technique by leveraging the translation of an MPL (including MiPL and IMPL) system into an equivalent Piecewise Affine (PWA) system and using Difference-Bound Matrix (DBM) to express the resulting abstract states as well as the set of atomic propositions. Such an abstraction technique results in an abstract transition system that allows replacing the verification of specifications over the original model. However, the existing techniques are not complete since they cannot determine whether the counterexample found on the abstract transition system is spurious. The other disadvantages are related to the scalability of the abstraction procedure and the limited expressiveness of DBM when dealing with specifications that contain conjunction or negation. This work addresses these issues by proposing novel abstraction procedures by identifying the propositions from the underlying model and specifications before generating the abstract states. These novel approaches allow the verification of more expressive specifications in Linear Temporal Logic (LTL). In addition to this, using the Bounded Model Checking (BMC) algorithm combined with spuriousness checking (of counterexample) and refinement procedures, we present the complete verification framework where the corresponding completeness threshold is related to the periodic behaviour of the model. Such behaviour is determined by a pair of transient (i.e., the starting index of periodic behaviour) and cyclicity (also called periodicity). Despite these developments, the proposed abstraction-based procedures remain not scalable. We then propose alternative methods utilising Satisfiability Modulo Theory (SMT). The main idea underpinning the SMT-based methods is to transform the dynamics of the model and possibly the specifications under consideration into a formula in quantifier-free Real Difference Logic (QF-RDL) or Linear Real Arithmetics (QF-LRA). The satisfaction of the resulting formula, which can be checked by SMT solvers, corresponds to the output for reachability and verification problems. Finally, the performance of the proposed methods (abstraction-based and SMT-based) is evaluated via a set of computational benchmarks, where we observe a significant improvement for the SMT-based procedures w.r.t. the scalability, compared to existing approaches whenever available

Control design of discrete-time unicycle model using satisfiability modulo theory

This paper discusses a formal control design of a discrete-time unicycle model using Satisfiability Modulo Theory (SMT). Given a set of possible initial positions, a set of possible target positions, a lane and a time horizon, we develop a method to formally synthesize a controller that drives the unicycle from a starting position to a target position within the given time horizon, while staying in the lane. The method encodes the set of possible initial positions, the set of possible target positions, the lane and the discrete-time unicycle model into linear real arithmetic expressions, and then checking the satisfaction via an SMT solver. If a solution exists, then the solution represents the controller. Finally, the proposed method is applied to a case study

EPiC Series in Computing

This report presents the results of a friendly competition for formal verification of continuous and hybrid systems with piecewise constant dynamics. The friendly competition took place as part of the workshop Applied Verification for Continuous and Hybrid Systems (ARCH) in 2019. In this third edition, six tools have been applied to solve five different benchmark problems in the category for piecewise constant dynamics: BACH, Lyse, Hy- COMP, PHAVer/SX, PHAVerLite, and VeriSiMPL. Compared to last year, a new tool has participated (HyCOMP) and PHAVerLite has replaced PHAVer-lite. The result is a snap- shot of the current landscape of tools and the types of benchmarks they are particularly suited for. Due to the diversity of problems, we are not ranking tools, yet the presented results probably provide the most complete assessment of tools for the safety verification of continuous and hybrid systems with piecewise constant dynamics up to this date