12 research outputs found

    The Application of an Inkjet Printer for the Creation of Patterns of Biornolecules on Surfaces

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    This project is one of the requirements in completing the MSc Microelectronics Systems Design. This project is one of the work tasks for a PhD project by Andrew Weld. This project is to be completed in three months. This project is a multi-disciplicinary project, which involves electronics, chemistry, biology and physics. This project allows a wide working environment, with association with not just ECS Department, but with other departments, too. This project's objective is to produce a 2D-arrayer that able to produce patterns of biomolecules on certain surfaces, which in this case, the glass slides. This project was initiated to aid the haplotype analysis in determining the existence of certain disease, by detecting specific characteristics exhibited by a unit affected by the disease. This 2D-arrayer will be used to produce 2D arrays of DNA molecules, m detecting the certain diffraction patterns using a biosensor device

    Modeling arbiter-PUF in NodeMCU ESP8266 using artificial neural network

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    A hardware fingerprinting primitive known as physical unclonable function (PUF) has a huge potential for secret-key cryptography and identification/authentication applications. The hardware fingerprint is manifested by the random and unique binary strings extracted from the integrated circuit (IC) which exist due to inherent process variations during its fabrication. PUF technology has a huge potential to be used for device identification and authentication in resource-constrained internet of things (IoT) applications such as wireless sensor networks (WSN). A secret computational model of PUF is suggested tobe stored in the verifier’s database as an alternative to challenge and response pairs (CRPs) to reduce area consumption. Therefore, in this paper, the design steps to build a PUF model in NodeMCU ESP8266 using an artificial neural network (ANN) are presented. Arbiter-PUF is used in our study and NodeMCU ESP8266 is chosen because it is suitable to be used as a sensor node or sink in WSN applications. ANN with a resilient back-propagation training algorithm is used as it can model the non-linearity with high accuracy. The results show that ANN can model the arbiter-PUF with approximately 99.5% prediction accuracy and the PUF model only consumes 309,889 bytes of memory space

    Characterization and antimicrobial analysis of chitosan composite biodegradable films with addition of lemon grass essential oil

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    The increasing demand in food safety, quality, convenience and environmental concerns associated with the handling of plastic waste has emphasized the importance in developing biodegradable and edible films from natural polymers, such as chitosan. Starch-based film is considered an economical material for antimicrobial packaging. This study aimed at the development of packaging based on chitosan-tapioca starch incorporated with lemon grass essential oil as antimicrobial agents. In this research, there are three samples were prepared. Sample A containing starch-chitosan as control film, sample B containing starch-chitosan with the addition of gelatin and sample C containing starch-chitosan based film incorporated with lemon grass essential oil. For the antimicrobial analysis, all the samples were tested on B. substilis and E. coli. Inhibition of bacterial growth was examined using two methods which are zone inhibition assay and liquid culture test. From the observations, sample C exhibited a wide clear inhibitory zone rather than samples A and B. From the liquid culture test, the sample C clearly demonstrated a better inhibition against B. substilis than E. coli. Incorporation of lemon grass essential oils also led to an improvement in several films properties in terms of morphology, chemical composition and thermal properties. The result from TGA and DSC has shown the higher thermal and melting temperature possesses by the sample C and slightly miscible and compatible with the starch-chitosan composition. The addition of lemon grass essential oil proves that the film is better to film based on starch-chitosan only. Lemon grass essential oil will actually improve the performance of the chitosan composite biodegradable film as tested in this research. As a conclusion, starch-chitosan composite biodegradable film has the potential to be use for food packaging

    Reliability of analogue circuits

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    The reliability of CMOS circuits has worsened due to technology scaling. From the review of previous work on reliability study for CMOS circuits, it has been found that both digital and analogue circuits were susceptible to single event effects. Single event effects although causing non-permanent errors have already been identified to have caused billion of dollars worth of lost. Single event transients have been established as one of the single event effects which may reduce the reliability of analogue circuits and safety critical systems, in general. The impact of radiation effects on analogue circuits has been investigated in this thesis using circuit-level single event transient modelling. The characterization of impact of single event transient has been investigated for several analogue circuits. These analogue circuits; namely operational amplifier and comparator, have been recognized to be susceptible to single event transients. Several influencing factors have been associated with previous works and this study to have impacts on the severity of the single event transients to these circuits. Sensitivity analysis has been completed to determine the most and the least sensitive transistor to be used in the variability analysis. The variability analysis addresses the impact of the influencing factors and this information may be used in finding the trade-off which exists between the influencing factors and single event transient. These trade-offs may also be used in mitigating the single event transient. A simple mitigation technique still at preliminary stage has also been included, as part of this study

    Analysis of the Reliability of Comparator circuits

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    The lack of study on analogue circuits reliability is likely due to the migration of analogue circuits to their digital equivalents. There are a considerable numbers of important analogue circuits such as amplifiers and comparators used in sensors in portable devices, which may be investigated on its reliability. The small number of investigations on analogue circuit's reliability has initiated the interest in investigating the impact of single event transients or soft errors for analogue circuits. Sensitivity analysis was performed to determine the sensitive parts of the circuit. The sensitivity analysis have indicated that single event transient has lead to erroneous behavior of comparators and eventually cause failure. The sensitive sub-circuits were later investigated on its dependence on variability of the design variables which covers both process and environment parameters. The variability analysis has proven that it does contribute towards increasing the sensitivity of the comparator to single event transients. Variability has also proven that it could increase the vulnerability of the least sensitive parts of the comparator

    Reliability Analysis of Comparators

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    The lack of study on analogue circuits reliability is likely due to the migration of analogue circuits to their digital equivalents. There are a considerable numbers of important analogue circuits such as amplifiers and comparators used in sensors in portable devices, which may be investigated on its reliability. The small number of investigations on analogue circuit's reliability has initiated the interest in investigating the impact of single event transients or soft errors for analogue circuits. Sensitivity analysis was performed to determine the sensitive parts of the circuit. The sensitivity analysis have indicated that single event transient has lead to erroneous behavior of comparators and eventually causefailure. The sensitive sub-circuits were later investigated on its dependence on variability of the design variables which covers both process and environment parameters. The variability analysis has proven that it does contribute towards increasing the sensitivity of the comparator to single event transients. Variability has also proven that it could increase the vulnerability of the least sensitive parts of the comparator

    Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM)

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    Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integration is considered as a possible technology option. CNTFETs are currently being preferred for implementing ternary circuits due to their desirable multiple threshold voltage and geometry-dependent properties, whereas the RRAM is used due to its multilevel cell capability which enables storage of multiple resistance states within a single cell. This article presents the 2-trit arithmetic logic unit (ALU) design using CNTFETs and RRAM as the design elements. The proposed ALU incorporates a transmission gate block, a function select block, and various ternary function processing modules. The ALU design optimization is achieved by introducing a controlled ternary adder–subtractor module instead of separate adder and subtractor circuits. The simulations are analyzed and validated using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions (supply voltages) to test the robustness of the designs. The simulation results indicate that the proposed CNTFET-RRAM integration enables the compact circuit realization with good robustness. Moreover, due to the addition of RRAM as circuit element, the proposed ALU has the advantage of non-volatility

    Design and Mathematical Modeling of CMOS Compatible - MEMS Microhotplate

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    Current Microhotplates have large power consumptions, temperature uniformity problems, and are highly priced; additionally, special stages are required to be integrated with ICs. The modeling and design of a MEMS Microhotplate (MHP) using standard 0.18 μm IP4M CMOS process technology is discussed in this paper. The designed MHP is intended to achieve good temperature uniformity while dissipating little power. The MHP microbridges lengths are varied from 80 μm to 120 μm whereas the MHP microbridges widths are varied from 5 μm to 25 μm. The effect of the length and width are studied and three different lengths of micro heater 15560 μm, 24360 μm, 35160 μm, and 5 μm width were studied. The optimized design with microbridges of 100 μm length and 25 μm width and a heater length of 15560 μm is selected. The power dissipation and operating temperature were measured using mathematical modeling and actuation voltages ranging from 0.2 V to 1 V. The modeling estimates MHP power dissipation ranging from 0.264 mW to 3.181 mW at operating temperatures ranging from 11.12 oC to 277.92 oC
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