指数関数演算回路における性能／面積間のトレードオフに関する評価

トランジスタ集積度の飛躍的な向上に伴い，LSI に搭載される算術演算回路の規模，複雑度が増加している．すな わち，今までソフトウェアで実現してきた指数関数，対数関数，三角関数，等の複雑な算術演算を算術演算回路，すなわち， ハードウェアとして実装できるようになってきた．本稿では，倍精度浮動小数点数に関する指数関数を対象に，新しいハード ウェア・アルゴリズムを提案し，その性能／面積間のトレードオフを評価する．Ever increasing density of transistors on LSI’s allows us to implement large and complex arithmetic circuits on board, and therefore some complex functions, such as exponential functions, which have been implemented by software are now potentially possible to be implemented by hardware. The paper surveys some existing hardware algorithm to implement exponential function, and then proposes a new hardware algorithm. The paper also tries to evaluate the tradeoff between performance and area of the algorithm

Consideration on Tradeoff for Performance/Area of Exponential Function Circuits

トランジスタ集積度の飛躍的な向上に伴い，LSI に搭載される算術演算回路の規模，複雑度が増加している．すな わち，今までソフトウェアで実現してきた指数関数，対数関数，三角関数，等の複雑な算術演算を算術演算回路，すなわち， ハードウェアとして実装できるようになってきた．本稿では，倍精度浮動小数点数に関する指数関数を対象に，新しいハード ウェア・アルゴリズムを提案し，その性能／面積間のトレードオフを評価する．Ever increasing density of transistors on LSI’s allows us to implement large and complex arithmetic circuits on board, and therefore some complex functions, such as exponential functions, which have been implemented by software are now potentially possible to be implemented by hardware. The paper surveys some existing hardware algorithm to implement exponential function, and then proposes a new hardware algorithm. The paper also tries to evaluate the tradeoff between performance and area of the algorithm

二電子積分計算専用プロセッサ・アーキテクチャ

筆者らは，非経験的分子軌道計算を高速に処理することを目的とする，二電子積分計算専用プロセッサの開発を行っている．二電子積分計算のアルゴリズムとして採用する小原のアルゴリズムの特徴を活かすことで高速処理が可能となる．本稿では，二電子積分計算専用プロセッサ・アーキテクチャの概要と全体構成について述べ，そのうち漸化計算エンジンの構成法の検討と性能の評価を行う．We are developing a custom processor for ab initio Molecular Orbital Calculation to reduce the calculation time. Using characterization of two-electron integrals in the “Obara method,” it is possible to reduce the calculation time. This paper describes an outline of processor architecture for Molecular Orbital Calculation. We propose and evaluate organizing method for Recursive Function Engine which a part of custom processor

Eric: A Special-Purpose Processor for ERI Calculations in Quantum Chemistry Applications

HPC-Asia 2002, Dec. 2002.Ab initio molecular orbital (MO) calculation is useful for solving many challenging problems regarding the development of new drugs, chemicals, polymers, materials, and so on. In the EHPC (Embedded High Performance Computing) project, we are now developing a special-purpose computer system for ab initio MO calculations in order to reduce the calculation time. The sequential execution time of ab initio MO is O( $N^4$) where $N$ is the number of basis functions, the heaviest computation being the electron repulsion integrals (ERI\u27s). In order to accelerate ab initio MO calculations, it is necessary to develop a special-purpose processor for ERI calculation. Using the characteristics of ERI in the Obara algorithm makes it possible to reduce the calculation time. In this work, we investigate a chip-multiprocessor (CMP) architecture, called Eric, for an application-specific processor able to perform fast ERI computations

Eric: A Special-Purpose Processor for ERI Calculations in Quantum Chemistry Applications

Ab initio molecular orbital (MO) calculation is useful for solving many challenging problems regarding the development of new drugs, chemicals, polymers, materials, and so on. In the EHPC (Embedded High Performance Computing) project, we are now developing a special-purpose computer system for ab initio MO calculations in order to reduce the calculation time. The sequential execution time of ab initio MO is O( $N^4$) where $N$ is the number of basis functions, the heaviest computation being the electron repulsion integrals (ERI's). In order to accelerate ab initio MO calculations, it is necessary to develop a special-purpose processor for ERI calculation. Using the characteristics of ERI in the Obara algorithm makes it possible to reduce the calculation time. In this work, we investigate a chip-multiprocessor (CMP) architecture, called Eric, for an application-specific processor able to perform fast ERI computations.HPC-Asia 2002, Dec. 2002