Adaptation of Ψ-MOSFET technique for ultra thin SOI

International audienc

Electrical characterization of ultra-thin SOI films : comparison of the pseudo–MOSFET and Hg–FET techniques

International audienc

Transport measurements in silicon-on-insulator films: Comparison of Hall effect, mobility spectrum, and pseudo-metal-oxide-semiconductor-field-effect-transistor techniques.

International audienc

Ultra-thin strained SOI substrate analysis by pseudo-MOS measurements

International audienc

Ultra-thin strained SOI substrate analysis by pseudo-MOS measurements

International audiencePseudo-MOS (Ψ -MOSFET) measurements are a simple and rapid technique for an accurate evaluation of SOI wafer intrinsic electrical properties, prior to any CMOS processing. For the first time, we report Ψ -MOSFET measurements performed on Strained SOI (SSOI) wafers with ultra-thin silicon films (9.5 nm to 17.5 nm). To take into account the wafer specificities and the use of such thin conduction layers, adapted Ψ -MOSFET models and parameter extraction methods were necessary. The experiments show an increase of the threshold and flat band voltages and a mobility reduction as the strained film becomes thinner. Further electrical analyses, coupled with several morphological studies, do not reveal any relaxation of the strain in the thinnest films. The mobility is clearly enhanced in SSOI as compared with standard SOI substrates