A committee machine gas identification system based on dynamically reconfigurable FPGA

This paper proposes a gas identification system based on the committee machine (CM) classifier, which combines various gas identification algorithms, to obtain a unified decision with improved accuracy. The CM combines five different classifiers: K nearest neighbors (KNNs), multilayer perceptron (MLP), radial basis function (RBF), Gaussian mixture model (GMM), and probabilistic principal component analysis (PPCA). Experiments on real sensors' data proved the effectiveness of our system with an improved accuracy over individual classifiers. Due to the computationally intensive nature of CM, its implementation requires significant hardware resources. In order to overcome this problem, we propose a novel time multiplexing hardware implementation using a dynamically reconfigurable field programmable gate array (FPGA) platform. The processing is divided into three stages: sampling and preprocessing, pattern recognition, and decision stage. Dynamically reconfigurable FPGA technique is used to implement the system in a sequential manner, thus using limited hardware resources of the FPGA chip. The system is successfully tested for combustible gas identification application using our in-house tin-oxide gas sensors

Comparison of reconfigurable structures for flexible word-length multiplication

Binary multiplication continues to be one of the essential arithmetic operations in digital circuits. Even though field-programmable gate arrays (FPGAs) are becoming more and more powerful these days, the vendors cannot avoid implementing multiplications with high word-lengths using embedded blocks instead of configurable logic. But on the other hand, the circuit's efficiency decreases if the provided word-length of the hard-wired multipliers exceeds the precision requirements of the algorithm mapped into the FPGA. Thus it is beneficial to use multiplier blocks with configurable word-length, optimized for area, speed and power dissipation, e.g. regarding digital signal processing (DSP) applications. <br><br> In this contribution, we present different approaches and structures for the realization of a multiplication with variable precision and perform an objective comparison. This includes one approach based on a modified Baugh and Wooley algorithm and three structures using Booth's arithmetic operand recoding with different array structures. All modules have the option to compute signed two's complement fix-point numbers either as an individual computing unit or interconnected to a superior array. Therefore, a high throughput at low precision through parallelism, or a high precision through concatenation can be achieved

Confession Session: Learning from Others Mistakes

Accepted versio

Identification and Characterization of the Host Protein DNAJC14 as a Broadly Active Flavivirus Replication Modulator

Viruses in the Flavivirus genus of the Flaviviridae family are arthropod-transmitted and contribute to staggering numbers of human infections and significant deaths annually across the globe. To identify cellular factors with antiviral activity against flaviviruses, we screened a cDNA library using an iterative approach. We identified a mammalian Hsp40 chaperone protein (DNAJC14) that when overexpressed was able to mediate protection from yellow fever virus (YFV)-induced cell death. Further studies revealed that DNAJC14 inhibits YFV at the step of viral RNA replication. Since replication of bovine viral diarrhea virus (BVDV), a member of the related Pestivirus genus, is also known to be modulated by DNAJC14, we tested the effect of this host factor on diverse Flaviviridae family members. Flaviviruses, including the pathogenic Asibi strain of YFV, Kunjin, and tick-borne Langat virus, as well as a Hepacivirus, hepatitis C virus (HCV), all were inhibited by overexpression of DNAJC14. Mutagenesis showed that both the J-domain and the C-terminal domain, which mediates self-interaction, are required for anti-YFV activity. We found that DNAJC14 does not block YFV nor HCV NS2-3 cleavage, and using non-inhibitory mutants demonstrate that DNAJC14 is recruited to YFV replication complexes. Immunofluorescence analysis demonstrated that endogenous DNAJC14 rearranges during infection and is found in replication complexes identified by dsRNA staining. Interestingly, silencing of endogenous DNAJC14 results in impaired YFV replication suggesting a requirement for DNAJC14 in YFV replication complex assembly. Finally, the antiviral activity of overexpressed DNAJC14 occurs in a time- and dose-dependent manner. DNAJC14 overexpression may disrupt the proper stoichiometry resulting in inhibition, which can be overcome upon restoration of the optimal ratios due to the accumulation of viral nonstructural proteins. Our findings, together with previously published work, suggest that the members of the Flaviviridae family have evolved in unique and important ways to interact with this host Hsp40 chaperone molecule

VLSI implementation of a neuromorphic spiking pixel and investigation of various focal-plane excitation schemes

The author describes a neuromorphic spiking pixel architecture allowing conversion of light intensity into a pulse train signal. The article first describes the spiking pixel architecture and its inherent advantages, such as light adaptation mechanism and linear response characteristics. Inspired by biological visual systems and the integrate and fire oscillator, different interpixels interaction schemes are studied and their synchronization abilities are compared. The spiking pixel architecture is implemented and the functionality of the spiking pixel imager is demonstrated through experimental results

Conversion time analysis of time domain digital pixel sensor in uniform and non-uniform quantizers

This paper analyzes the conversion time of a time domain digital pixel sensor based on pulse width modulation scheme. Two quantization schemes are studied namely the Uniform Time domain (UQ) and the Non Uniform Time domain (NUQ) quantizers. It is shown that the latter scheme not only permits to linearize the non-liner response of a PWM vision sensor but also allows to significantly speed-up the conversion time particularly for wide dynamic range and lower coding resolution. The VLSI architecture of a reconfigurable DPS for variable spatial and coding resolutions is proposed in 1-poly, 5 metal CMOS 0.35 mu m n-well process

An 8/4-bit reconfigurable digital pixel array with on-chip non-uniform quantizer

A CMOS Digital Pixel Sensor (DPS) with reconfigurable coding (8/4-bit) and spatial (32 x 32/64 x 32) resolutions is proposed in this paper. The sensor is based on time domain coding which converts the photocurrent into an inversely proportional pulse width (PWM) signal. The 8-bit conversion mode is used for high quality imaging while the 4-bit conversion mode provides a shorter conversion time and a 2-fold increase in spatial resolution. In order to overcome the non-linearity introduced in the time domain PWM coding, a linearization procedure based on Non-Uniform Time domain quantizer is proposed. The reconfiguration features of the imager are demonstrated through experimental results obtained from a prototype designed using I-poly, 5 metal CMOS 0.35 mu m n-well standard process

Face detection using classifiers cascade based on vector angle measure and multi-modal representation

This paper deals with face detection in still gray level images which is the first step in many automatic systems like video surveillance, face recognition, and images data base management. We propose a new face detection method using a classifiers cascade, each of which is based on a vector angle similarity measure between the investigated window and the face and nonface representatives (centroids). The latter are obtained using a clustering algorithm based on the same measure within the current training data sets, namely the low confidence classified samples at the previous stage of the cascade. First experiment results on refereed face data test sets are very satisfactory