9,587 research outputs found

    High-speed equalization and transmission in electrical interconnections

    Get PDF
    The relentless growth of data traffic and increasing digital signal processing capabilities of integrated circuits (IC) are demanding ever faster chip-to-chip / chip-to-module serial electrical interconnects. As data rates increase, the signal quality after transmission over printed circuit board (PCB) interconnections is severely impaired. Frequency-dependent loss and crosstalk noise lead to a reduced eye opening, a reduced signal-to-noise ratio and an increased inter-symbol interference (ISI). This, in turn, requires the use of improved signal processing or PCB materials, in order to overcome the bandwidth (BW) limitations and to improve signal integrity. By applying an optimal combination of equalizer and receiver electronics together with BW-efficient modulation schemes, the transmission rate over serial electrical interconnections can be pushed further. At the start of this research, most industrial backplane connectors, meeting the IEEE and OIF specifications such as manufactured by e.g. FCI or TE connectivity, had operational capabilities of up to 25 Gb/s. This research was mainly performed under the IWT ShortTrack project. The goal of this research was to increase the transmission speed over electrical backplanes up to 100 Gb/s per channel for next-generation telecom systems and data centers. This requirement greatly surpassed the state-ofthe-art reported in previous publications, considering e.g. 25 Gb/s duobinary and 42.8 Gb/s PAM-4 transmission over a low-loss Megtron 6 electrical backplane using off-line processing. The successful implementation of the integrated transmitter (TX) and receiver (RX) (1) , clearly shows the feasibility of single lane interconnections beyond 80 Gb/s and opens the potential of realizing industrial 100 Gb/s links using a recent IC technology process. Besides the advancement of the state-of-the-art in the field of high-speed transceivers and backplane transmission systems, which led to several academic publications, the output of this work also attracts a lot of attention from the industry, showing the potential to commercialize the developed chipset and technologies used in this research for various applications: not only in high-speed electrical transmission links, but also in high-speed opto-electronic communications such as access, active optical cables and optical backplanes. In this dissertation, the background of this research, an overview of this work and the thesis organization are illustrated in Chapter 1. In Chapter 2, a system level analysis is presented, showing that the channel losses are limiting the transmission speed over backplanes. In order to enhance the serial data rate over backplanes and to eliminate the signal degradation, several technologies are discussed, such as signal equalization and modulation techniques. First, a prototype backplane channel, from project partner FCI, implemented with improved backplane connectors is characterized. Second, an integrated transversal filter as a feed-forward equalizer (FFE) is selected to perform the signal equalization, based on a comprehensive consideration of the backplane channel performance, equalization capabilities, implementation complexity and overall power consumption. NRZ, duobinary and PAM-4 are the three most common modulation schemes for ultra-high speed electrical backplane communication. After a system-level simulation and comparison, the duobinary format is selected due to its high BW efficiency and reasonable circuit complexity. Last, different IC technology processes are compared and the ST microelectronics BiCMOS9MW process (featuring a fT value of over 200 GHz) is selected, based on a trade-off between speed and chip cost. Meanwhile it also has a benefit for providing an integrated microstrip model, which is utilized for the delay elements of the FFE. Chapter 3 illustrates the chip design of the high-speed backplane TX, consisting of a multiplexer (MUX) and a 5-tap FFE. The 4:1 MUX combines four lower rate streams into a high-speed differential NRZ signal up to 100 Gb/s as the FFE input. The 5-tap FFE is implemented with a novel topology for improved testability, such that the FFE performance can be individually characterized, in both frequency- and time-domain, which also helps to perform the coefficient optimization of the FFE. Different configurations for the gain cell in the FFE are compared. The gilbert configuration shows most advantages, in both a good high-frequency performance and an easy way to implement positive / negative amplification. The total chip, including the MUX and the FFE, consumes 750mW from a 2.5V supply and occupies an area of 4.4mm × 1.4 mm. In Chapter 4, the TX chip is demonstrated up to 84 Gb/s. First, the FFE performance is characterized in the frequency domain, showing that the FFE is able to work up to 84 Gb/s using duobinary formats. Second, the combination of the MUX and the FFE is tested. The equalized TX outputs are captured after different channels, for both NRZ and duobinary signaling at speeds from 64 Gb/s to 84 Gb/s. Then, by applying the duobinary RX 2, a serial electrical transmission link is demonstrated across a pair of 10 cm coax cables and across a 5 cm FX-2 differential stripline. The 5-tap FFE compensates a total loss between the TX and the RX chips of about 13.5 dB at the Nyquist frequency, while the RX receives the equalized signal and decodes the duobinary signal to 4 quarter rate NRZ streams. This shows a chip-to-chip data link with a bit error rate (BER) lower than 10−11. Last, the electrical data transmission between the TX and the RX over two commercial backplanes is demonstrated. An error-free, serial duobinary transmission across a commercial Megtron 6, 11.5 inch backplane is demonstrated at 48 Gb/s, which indicates that duobinary outperforms NRZ for attaining higher speed or longer reach backplane applications. Later on, using an ExaMAX® backplane demonstrator, duobinary transmission performance is verified and the maximum allowed channel loss at 40 Gb/s transmission is explored. The eye diagram and BER measurements over a backplane channel up to 26.25 inch are performed. The results show that at 40 Gb/s, a total channel loss up to 37 dB at the Nyquist frequency allows for error-free duobinary transmission, while a total channel loss of 42 dB was overcome with a BER below 10−8. An overview of the conclusions is summarized in Chapter 5, along with some suggestions for further research in this field. (1) The duobinary receiver was developed by my colleague Timothy De Keulenaer, as described in his PhD dissertation. (2) Described in the PhD dissertation of Timothy De Keulenaer

    On the topological pressure of axial product on trees

    Full text link
    This article investigates the topological pressure of isotropic axial products of Markov subshift on the dd-tree. We show that the quantity increases with dimension dd, and demonstrate that, with the introduction of surface pressure, the two types of pressure admit the same asymptotic value. To this end, the pattern distribution vectors and the associated transition matrices are introduced herein to partially transplant the large deviation theory to tree-shifts, and so the increasing property is proved via an almost standard argument. An application of the main result to a wider class of shift spaces is also provided in this paper, and numerical experiments are included for the purpose of verification

    The strip entropy approximation of Markov shifts on trees

    Full text link
    The strip entropy is studied in this article. We prove that the strip entropy approximation is valid for every ray of a golden-mean tree. This result extends the previous result of [Petersen-Salama, Discrete \& Continuous Dynamical Systems, 2020] on the conventional 2-tree. Lastly, we prove that the strip entropy approximation is valid for eventually periodic rays of a class of Markov-Cayley trees

    56+ Gb/s serial transmission using duo-binary signaling

    Get PDF
    In this paper we present duobinary signaling as an alternative for signaling schemes like PAM4 and Ensemble NRZ that are currently being considered as ways to achieve data rates of 56 Gb/s over copper. At the system level, the design includes a custom transceiver ASIC. The transmitter is capable of equalizing 56 Gb/s non-return to zero (NRZ) signals into a duobinary response at the output of the channel. The receiver includes dedicated hardware to decode the duobinary signal. This transceiver is used to demonstrate error-free transmission for different PCB channel lengths including a state-of-the-art Megtron 6 backplane demonstrator

    Boundary complexity and surface entropy of 2-multiplicative integer systems on Nd\mathbb{N}^d

    Full text link
    In this article, we introduce the concept of the boundary complexity and prove that for a 2-multiplicative integer system (2-MIS) XΩpX^{p}_{\Omega} on N\mathbb{N} (or XΩpX^{\bf p}_{\Omega} on Nd,d2\mathbb{N}^d,d\geq 2), every point in [h(XΩp),logr][h(X^p_\Omega), \log r] can be realized as a boundary complexity of a 2-MIS with a specific speed, where r stands for the number of the alphabets. The result is new and quite different from Nd\mathbb{N}^d subshifts of finite type (SFT) for d1d\geq 1. Furthermore, the rigorous formula of surface entropy for a Nd\mathbb{N}^d 2-MIS is also presented. This provides an efficient method to calculate the topological entropy for Nd\mathbb{N}^d 2-MIS and also provides an intrinsic differences between Nd\mathbb{N}^d kk-MIS and SFTs for d1d\geq 1 and k2k\geq 2

    Information loss in local dissipation environments

    Full text link
    The sensitivity of entanglement to the thermal and squeezed reservoirs' parameters is investigated regarding entanglement decay and what is called sudden-death of entanglement, ESD, for a system of two qubit pairs. The dynamics of information is investigated by means of the information disturbance and exchange information. We show that for squeezed reservoir, we can keep both of the entanglement and information survival for a long time. The sudden death of information is seen in the case of thermal reservoir

    A Novel Model of Atherosclerosis in Rabbits Using Injury to Arterial Walls Induced by Ferric Chloride as Evaluated by Optical Coherence Tomography as well as Intravascular Ultrasound and Histology

    Get PDF
    This study aim was to develop a new model of atherosclerosis by FeCl3-induced injury to right common carotid arteries (CCAs) of rabbits. Right CCAs were induced in male New Zealand White rabbits (n = 15) by combination of a cholesterol-rich diet and FeCl3-induced injury to arterial walls. The right and left CCAs were evaluated by histology and in vivo intravascular ultrasound (IVUS) and optical coherence tomography (OCT) examinations of 24 hours (n = 3), 8 weeks (n = 6), and 12 weeks (n = 6) after injury. Each right CCA of the rabbits showed extensive white-yellow plaques. At eight and 12 weeks after injury, IVUS, OCT, and histological findings demonstrated that the right CCAs had evident eccentric plaques. Six plaques (50%) with evident positive remodeling were observed. Marked progression was clearly observed in the same plaque at 12 weeks after injury when it underwent repeat OCT and IVUS. We demonstrated, for the first time, a novel model of atherosclerosis induced by FeCl3. The model is simple, fast, inexpensive, and reproducible and has a high success rate. The eccentric plaques and remodeling of plaques were common in this model. We successfully carried out IVUS and OCT examinations twice in the same lesion within a relatively long period of time
    corecore