Theoretical discussion on reduced aberration sensitivity of enhanced alternating phase-shifting masks

Two theories are developed to quantify image skew of photomask features caused by aberrations. In one formulation, the extent of image distortion can be described by the image asymmetry (Δxasymmetry) ,which captures both image shift and sidelobe intensity imbalance. This quantity is equivalent to the shift of the image centroid. In situations where one is more concerned with placement error than centroid shift, the change in the location of the intensity extremum (Δxshift) can be expressed as functions of the mask spectrum and the wave aberration. This theory on image shift is applied to the study of enhanced alternating PSMs. Although the optimal mask pattern is aberration-function-specific, mask spectra with gradual variations have lower placement sensitivity in general. These theories are applicable to all mask technologies and patterns.published_or_final_versio

The Politics of International Terrorism in the Security Complexes in the Greater Horn of Africa: An Overview from Uganda under the Movementocracy

The article attempts to analyse the phenomenon of international terrorism in the Greater Horn Security Complexes, with the emphasis on the role of Uganda’s Movementocratic government. The article is premised on the thesis that ‘International Terrorism’, apart from its local, national, regional and global causes, has become one of the key determinants of foreign policy and regional relations in the Greater Horn of Africa, and even more so for Uganda. It asserts that given the uniqueness of the Movementocracy and the global appraisal of this governance, Uganda is at the moment standing up to be counted by western countries as one of the vanguards in the fight against international terrorism in the Greater Horn of Africa. It also considers the causes and consequences of international terrorism and the methodologies and strategies for addressing this political scourge at the local, national, regional, continental and global levels. Here we shall examine unilateral, bilateral and multilateral approaches in dealing with international terrorism through states and non-states arrangements and methodologies

Quantification of image quality

Traditionally, the common window method is used to quantify image quality in optical lithography. The common window method can take dose variation. focus error, mask critical dimension error and aberrations into account. However, the demerit of the common window method is its computation time. In this paper, a new metric called Normalized Process Latitude (NPL) is proposed. The NPL considers dose variation, focus error, mask critical dimension error and aberrations to output its fmal quantification value. Its processing time for quantifying one feature is usually within 10 seconds on a PC with 1GHz CPU and 256MB DRAM. We perform several comparisons between the total window value and the NPL. It is found that the NPL draws similar conclusion as the total window. We can conclude that NPL is a sensible figure ofmerit for image quantification.published_or_final_versio

Acute urinary retention associated with selective serotonin reuptake inhibitors and ziprasidone [4]

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Feasibility of 50-nm device manufacture by 157-nm optical lithography: an initial assessment

The normalized process latitude (NPL) is used to assess the feasibility of 50-nm device manufacture by 157-nm optical lithography. A first NPL quantification assuming steady improvement of processing technology shows that 157-nm optical lithography is infeasible. A second NPL quantification investigates the amount of technology acceleration required to make 50-nm manufacture possible. It is concluded that photolithography is a viable lithography technique for the 50-nm technology generation only with significant improvements in focus control, photomask making, photoresist contrast, as well as aberration levels.published_or_final_versio

Asymmetric biasing for subgrid pattern adjustment

The location of a printed edge can be controlled to a fineness that is two orders of magnitude smaller than the design grid, if a slight displacement of the pattern can be tolerated. The essence of this asymmetric subgrid biasing technique is the crenelation of two edges of a pattern into different periods. Fractional arithmetic results in a bias increment that much smaller than that can be achieved with halftone biasing. For a design grid of 20 nm (1X) , and an exposure system with A = 248 nm, NA = 0.68, and a = 0.8, the bias increment can be as small as 0.22 nm.published_or_final_versio

Effects of grid-placed contacts on circuit performance

The impact of grid-placed contacts on application-specific integrated circuit (ASIC) performance is studied. Although snapping contacts to grid adds restrictions during layout design, smaller circuit area can be achieved by careful selection of the grid pitch, raising the lower limit of transistor width, applying double exposure, and shrinking the minimum contact pitch enabled by more effective application of resolution enhancement technologies. The technique is demonstrated on the contact level of 250-nm standard cells with the minimum contact pitch shrunk by 10%. The area change of 84 cells ranges from -20% to 25% with a median decrease of 5%. The areas of two circuits, a finite-impulse-response (FIR) filter and an add-compare-select (ACS) unit in the Viterbi decoder, decrease by 4% and 2% respectively. Delay and power consumption are also estimated to decrease with area.published_or_final_versio

A study on theoretical representation of intermodulation in CMOS balanced mixers

Intermodulation of CMOS balanced mixers is analyzed in this papaer with the aim to reduce the effects of intermodulation dostortion into a set of simple equations. The analysis consists of a theoretical study and simulation results. Analysis and simulations results reveal that the mechanism of intermodulation in balancesd mixer is too complex to be represented by simple equations. Numerical methods must be used to predict the effects of intermodulation in balanced mixer.published_or_final_versio

Designing of precomputational-based low-power Viterbi decoder

This work addresses the low-power VLSI implementation of the Viterbi decoder (VD). A new precomputational scheme applied to the trellis butterflies calculation is presented. The proposed scheme is implemented in a 16-state, rate 1/3 VD. Gate-level power verification indicates that the proposed design reduces the power dissipated by the original trellis butterflies calculation by 42%.published_or_final_versio